Designing amp with 2SJ201/2SK1530

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lineup said:
About Lateral or Vertical for 2SK1530 / 2SJ201
we have discussed this a number of time = search forum

http://www.diyaudio.com/forums/search.php
>>> 2SK1530 lateral

In my opinion they are more lateral if we look at main characteristics.
Anyway, they are very good powerful mosfet.
Quite easy to drive (not too much current needed).

About temp coefficient.
I would use some vbe compensation voltage (not pure resistive output bias control).

About Hawkford / Cordell Error correction approach with these
it is better Robert Cordell will answer you on this ;)
Besides I do not use such fancy corrections .. only normal feedback correction.

They are not lateral. It is a structural difference, and they are not built like that. Lateral fets get very high on resistance and also the source and drain connections will be reversed.

Still, that doesn't mean they are bad for audio. They were designed for it. They don't have the same self protection as laterals do though.
 
Guthorst said:


Dear traderbam,

that sounds interesting. Because the forward path has a less than unity gain, and the result should be unity gain, there must be something in the feedback path to increase gain. Doesn't that mean "Positive Feedback"?

It doesn't imply positive feedback. You don't have to generate the loop gain using this method. It is a convenience in Cordell's design to do so.

You rarely see PFB loops used to synthesize gain. They increase the distortion of the components within their loops, in the same way that NFB loops decrease it, and similarly they reduce the phase margin. This is ok if you start with adequately high bandwidth and low distortion components.

In contrast, the Complementary Feedback Pair has a high open loop gain, and it uses conventional NFB. But it shows worse THD+Noise than Cordell's EC.

CFP is just one means to apply NFB. There are better ones. The performance depends on the NFB loop gain and where the error signal is sensed, if other aspects of the implementation are competent.

I think, the best way to influence THD is to improve the output stage. Because it has most contribution to non-linearity, and depends on output load, output current and non-resistive loads have to be taken into account.
But the output stage should be optimized without using too many transistors or other components, which may result in a negative impact to noise or performance.

I agree with this as a general rule, especially your last sentence. :)

Brian
 
h_a said:
Lineup, may I correct you on this one?
lineup said:

If Class A is impractical = too much idle power (say for me is >=60 Watt Idle per channel)
than I go for 'normal Class AB'
... as you say, to remove as much crossover effects as possible


No, dear Hannes, you may not correct me.
As you twist my statement .. probably you're misreading :D
=========
original statement by Lineup

If Class A is impractical
than I go for 'normal Class AB' ... as you say, to remove as much crossover effects as possible


==================

About vertical or lateral.
No matter if the manufacturintg technique used,
these are, to me, more lateral
when comes to charateristics (see datasheet)

1. And so can be used for audio like we use LATERAL MOSFET
with less current in drive stage (VAS). (Less than for IRF HEXFET)

2. Even when using laterals, we use some form of temp compensation.
At least if we are clever.
And we use Big Enough heatsinks,
to reduce temperature variations
as much as we can, don't we ;)
 
Rikard Nilsson said:
Looks interesting!

I like symmetrical designs, something tells me non symmetricals are not as good, eventhough I have seen many very nice amps that are not symmetrical...

So, here is my prototype. I have built one but not using the error correction stage. I get ok performance from it, but would like to see this EC work.

I zipped a gif screenshot, hope it opens ok.

even the most "symmetrical" looking designs, though they are pleasing to the eye, aren't truly symmetrical. PNP and NPN (or N-cannel and P-channel) devices, although they may be complements, never exactly mirror each other. board layouts also tend to have minor difference between the halves of the circuit that can introduce asymmetrical errors in to the operation of the circuit.

Hafler output stages offer a clue here, since the "complementary" output devices have differing compensation caps and sometimes differing gate snubber resistors.

these differences between complementary devices show up first as asymmetrical slew rates or asymmetrical clipping recovery. not a whole lot that can be done about it, because it's rooted in semiconductor physics. you can tweak a design to get it close. just how close depends on how obsessed you want to get to make it "perfect". you get to a point with amp design where you run into the law of diminishing returns. it might cost you $0.02 to get from 0.1% to 0.01%THD. then it costs $0.20 to get from 0.01% to 0.001%. then it costs $2.00 to go from 0.001% to 0.0005%, and $20.00 to go to 0.0002% etc...
 
The notion that the amount of feedback, ie: the feedback loop gain, varies with the error is incorrect. Do the maths, do the sims.

Mmh, I always thought that was the main point. But I looked more closely at that amps output stage quite some time ago, I guess I should revisit it.

As you twist my statement .. probably you're misreading

Sorry, Lineup, seems I really misread it!

Have fun, Hannes
 
regarding signal error vs. feedback factor

at higher frequencies and more output currents the open loop gain (OLG) gets lower
and so the error will increase a bit, while the feedback margin gets lower

there is a relationship between
- the amount of error in output signal
and
- how much feedback the circuit have left
... which in turn is depending on frequency & output current level
 
Guthorst said:
This is a first proposal from my last design I'm working on. It's a current conveyor, like Jan Didden used...

That is a very creative design, Guthorst. I like the elegant simplicity of it.
Regarding its ability to reduce output error, how much feedback loop gain does it provide at 20kHz and what is the unity gain f and phase margin?
 
Lumba Ogir said:
Brian,

Like what?

One drawback with the CFP arrangement is that it isn't just the output transistors that go non-linear, but the drivers too. So the control system is very non-linear. Better to keep the non-linearity in the output transistors only.

There are many ways to skin a cat. The simplest is to use a conventional topology with differential input stage and source follower output. You then have a single output sense point, the only transistors operating in a very non-linear manner are the output transistors and the control transistors can all be run in class A. The single control loop is in charge throughout the cycle and at no point does it run out of loop gain.
 
it also pays to use output devices that are as linear as possible. for bipolars, look at the Ic/beta curves. what you're looking for is as flat a curve as possible. some devices are designed as "stabilized beta" devices, and are the most linear. as far as MOSFETs go, i think it's the Gm/Vds curve you want to look at. mosfets are more difficult to linearize, which is why they are run at higher idle currents (i.e. biased closer to class A operation)
 
Rikard,
The point I am trying to get across is that only three things actually matter. The inherent distortion of the circuit, the stable NFB loop gain and the accuracy of the error sensing.

The Cordell circuit has some advantages over CFP. For one thing, the error sensing circuitry operates in a transconductance mode and is voltage shielded; it doesn't see the output voltage swing. Some implementations of conventional NFB do not incorporate this and have higher inherent distortion.

In any case, the error reduction of the Cordell circuit is due to its NFB loop gain and this was predicted by simulation and compared with the original testbench measurements, and they agreed very closely. I can't recall the figure, but I think it was in the 30dB region, with a 6dB/oct roll off and unity loop gain below 10MHz.

To beat the Cordell circuit, you need to beat the inherent distortion and/or have more than 30dB of stable NFB at 20kHz or more. If you think about the problem in this way, you will be able to design a better circuit.

Brian
 
Rikard Nilsson said:
....thought it should be possible to cancel this out with the HEC approach.
I am making som practical tests now, so exciting to see if this works or not. :)

Keep on Rikard
I think you know this just as good as anyone else here.
You just keep us informed about your results.
thank you :)

Lineup Lycksele västerbotten lappland
 
Hehe, another swede! Seems to be a couple of us here...:)

I didn´t have the time to test the full setup today, I only managed to set the idle current and check that nothing smokes.....but the driver transistors get a bit too warm for comfort. And I did get a few mV DC offset at the output, can´t really see why. Haven´t had this before, so maybe something isn´t right.

The idle was very stable at least, so there´s yet another benefit from the Cordell circuitry.

:)
 
Rikard Nilsson said:
Ok, so the lower drive voltage will make the HEC ineffective? If so, a simple resistor voltage divider to the gates would make the drive voltage seen by the HEC circuit just as it was originally designed.

Well, I´m gonna have a try at least. :)

PS. I agree that Cordells circuit is a kind of local NFB. But nonetheless it seems very effective. I was also thinking of developing something that never lets the current drawn by the FETs down to zero. Technically this would still be class A operation, but not that ineffective. maybe somebody has already done this? (Not simply raising the idle that is)



In hawksford's paper, AES preprint 1574 he uses a darlington triple as an example.
I don't think voltage will be an issue.
 
Rikard Nilsson said:
I was also thinking of developing something that never lets the current drawn by the FETs down to zero. Technically this would still be class A operation, but not that ineffective. maybe somebody has already done this?

There's an article in the 1981 AES Journal by Susumu Tanaka from Sansui that describes a circuit that does just this. The article is called "New Biasing Circuit for Class B Operation". If you send me an email, I can provide more information :).
 
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