Unclejed,
Thanks for your reply.
In practice I drive it from a tube stage and in test situations from a 50 Ohm function generator.
Capacitances (voltage dependant off course):
2SA side: Pre driver 2.5pF, Driver 25pF, Output device 500pF
2SC side: Pre driver 1.8pF, Driver 16pF, Output device 250pF
Things are even more worse than you sugested! I have measured the total beta. It is 6,400,000!!!
Peter
Thanks for your reply.
In practice I drive it from a tube stage and in test situations from a 50 Ohm function generator.
Capacitances (voltage dependant off course):
2SA side: Pre driver 2.5pF, Driver 25pF, Output device 500pF
2SC side: Pre driver 1.8pF, Driver 16pF, Output device 250pF
Things are even more worse than you sugested! I have measured the total beta. It is 6,400,000!!!
Peter
pietjers said:
It can indeed take a lot of equipment, but as someone else suggested, nowadays the less-equipped DIYer can look to PC-based soundcard solutions, combining quality soundcards with appropriate software. I have not delved deeply enough into this area yet, but I have used the Juli@ sound card with some software like Visual Analyzer.
The key, I think, is in building some purpose-built DIY hardware to enhance the capability and performance of the PC-soundcard arrangement. One could build a box to handle the I/O interfaces to the amplifier under test.
Also, one could build the Distortion Magnifier (DM) that I use to enhance the distortion floor and spectrum analyzer floor of the PC solution. The Distortion Magnifier is a purpose-built piece of equipment that essentially does a carefully level and phase-matched subtraction of the input of the amplifier from the scaled-down output of the amplifier to magnify distortion by a factor of 10 or 100. Things like this could go a long way to allowing one to do fairly good measurements with a decent sound card and software.
Cheers,
Bob
ppl said:
pietjers said:
Type 1 Circuit works great in my application as a headphone Driver and or low power Loudspeaker amp (About 10 Watts into 8 ohms on +/- 20 volt Rails)
Type 2 circuit displayed most all the qualities your circuit dose and i also tried all the compensation methods you did except caps from the Base of the Upper cascode to the Plus Rail because i use a Current source in that location and i don't believe it is a good Idea to put a cap across a Current source. Now this type 2 circuit dose work properly for a few Hours then if you touch any part of the circuit as it is powered up it breaks into oscillation and the Icq goes from 30 mA on the Output transistors to over 2 Amps. and will not pass an AC signal yet DC offset is still low. then touch any part again and the instability stops. Since this issue is apparently thermal and or time related, In addition to the fact that standard compensation methods are ineffective i suspect that in my instance the PC Artwork may be at issue or perhaps alternate Transistor selection however the Chosen devices in theory should be ideal for this application and they also work in the type 1 circuit.
I understand that their are people that question the validly of a tipple darlington string as allot of Phase shift can result from each additional stage, however the Huge amount of Current gain available allows a High impedance lightly Biased Vas stage to be employed, Moreover for an application of using a Tube front End would benefit alot from this high of Current gain and would remove allot of the Load interaction upon the VAS.
The talk of miller capacitance is also not an issue as much as it is with non cascoded Output stages (See Pass).
Regardless of if a tipple Darlington stage is appropriate or not is not my concern hear as similar stages have been done before and apparently there designers were able to make em stable and this is my Goal hear to make The Type 2 circuit stable and if that is not possible revert back to the working type 1 circuit, however i would like to move froward not stagnate on this, Thanks for Reading.
unclejed613 said:
In fact, there is an exactly opposite effect. Whatever input capacitance the output devices have, would be divided by total beta of two previous stages (NOT the total of all 3 stages!), i.e. 1000 pF on the output devices would became only a fraction of a pF load for the VAS. However with an increase in frequency the beta drops down and the output devices capacitance loads the VAS more. It is not necessarily a bad thing, thought.
Cheers
x-pro
ppl said:
One thing to keep in mind is that Cob increases as Vce decreases and for most power BJT's it takes a more dramatic turn for the worse as Vce drops below 5V, so by cascoding with too low a voltage across the output transistors, you can actually increase the average capacitive load on the driver transistors.
Cascoded power output stages look nice on paper, but making one that performs better (not worse) than a well executed double or tripple EF isn't that easy.
Lumba Ogir said:
Things are going well. When I finish rebuilding my car shed and get all the engines, engine cranes, gearboxes and cra@p out of my electronic workshop shed I'll be able to finish building my 1kW per channel rail tracking (sort of like cascoded) class A EC amp.
Also remember that >Cob with <Vce comes with fT droop as well, so too low a bootstrapped Vce for your output trannies not only gives more input capacitance but less bandwidth too.
Hi Lumba,
maybe it's just me, but I do not understand your schematic. It seems your inputs are the bases of T5/T6, and the bulk on the positive rail might be an output modulated current source. So you take T5 and T6+load as active load? Why the asymmetry with T6 and load in series?
As you see now what the results of my short look are (shockingly incorrect I guess), maybe you could post a short description of what you have in mind about this thing?
All the best, Hannes
maybe it's just me, but I do not understand your schematic. It seems your inputs are the bases of T5/T6, and the bulk on the positive rail might be an output modulated current source. So you take T5 and T6+load as active load? Why the asymmetry with T6 and load in series?
As you see now what the results of my short look are (shockingly incorrect I guess), maybe you could post a short description of what you have in mind about this thing?
All the best, Hannes
PPL,
Perhaps increasing the values of R32, R33 (470 Ohm) helps. In my case series resistance at the input was most effective. Success with getting things stable!
Kleinschmidt,
I agree with you say about Vce. It’s a good idea to increase the voltage of the shunt voltage references with at least a few volt.
Peter
Perhaps increasing the values of R32, R33 (470 Ohm) helps. In my case series resistance at the input was most effective. Success with getting things stable!
Kleinschmidt,
I agree with you say about Vce. It’s a good idea to increase the voltage of the shunt voltage references with at least a few volt.
Peter
Apperently you and I think alike because changing the value of the Base stopper resistor is my 1st try with these types of instability. but heck ill try say 2.2k and see what happens. I had another Buffer design i did a few years ago require a quite large resistor on the Input transistors base, BTW i use 2 BLUE LED's in series that gives me just over 6 volts as the reference, This should be plenty with these transistors but then again ill try that also thankspietjers said:
To a somewhat limited extend I'd say yes. One must carefully design in reasonable parasitics (trace/wire inductances and realistic power supply behaviour) and one should make shure that the models reflect at least the device parasitics in a first order approximation (FET models tend to be notoriously bad in this respect). Also the parts should be run under normal operating conditions to partly avoid modelling errors which greatly increase when one leaves typical operation points (say, very low Vce, very low/high currents etc). And then you need to do many Monte-Carlo runs with step/pulse transient runs under many load conditions (true arbitrary output voltages and currents), to look what happens when parameters shift...pietjers said:
All in all, if you manage that your sim behaves unstable, it probably will in real life also. But you sure can't prove the negative this way.
Spice is generally way better for looking at stability concers that arise from control loops (global feedback) as this is a systems thing, not uncontrolled and complex behaving parasitics.
- Klaus
This is an update because in the past week I have built and tested the circuit beneath (only with 10V zeners instead of the 5V references).
What most worried me was circuit stability. Well, I must say that these worries have turned out to be true! This circuit is really very hard to get stable. I tried all of the usual ways to get it right (like described in post #59). It is stable under certain circumstances, but during power-up lots of nasty oscillations can be seen that disappear once it’s settled.
The rejection of AC signals across the output devices is quite good. With 2V AC at the output I measured the Vce (10 V DC) of the output devices to have only 3mV AC (-56.5 dB). It is also rather frequency independent, giving at 1 kHz about the same values as at 20 kHz.
For now it’s too much work to tame this beast, probably I will give it a try later when I have more time to investigate it.
Peter
What most worried me was circuit stability. Well, I must say that these worries have turned out to be true! This circuit is really very hard to get stable. I tried all of the usual ways to get it right (like described in post #59). It is stable under certain circumstances, but during power-up lots of nasty oscillations can be seen that disappear once it’s settled.
The rejection of AC signals across the output devices is quite good. With 2V AC at the output I measured the Vce (10 V DC) of the output devices to have only 3mV AC (-56.5 dB). It is also rather frequency independent, giving at 1 kHz about the same values as at 20 kHz.
For now it’s too much work to tame this beast, probably I will give it a try later when I have more time to investigate it.
Peter
An externally hosted image should be here but it was not working when we last tested it.
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