32bit software versus 64 bit software ...
Same default settings (only compression unchecked)
results very similar ... but not equal.
Simulation speed is higher using the new 64 bit LTSpice17
6.359 versus 4.299 seconds.
We are able to design more new amplifiers in a shorter period of time!
BR, Toni
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32bit software versus 64 bit software ...
Same default settings (only compression unchecked)
results very similar ... but not equal.
Simulation speed is higher using the new 64 bit LTSpice17
6.359 versus 4.299 seconds.
We are able to design more new amplifiers in a shorter period of time!
BR, Toni
I'm of course not talking about speed differences. A new PC will also fix this.
I would be worried if the actual sim results would differ.
Jan
Some gremlins seem to be being reported with LTspice XVII
Have a look at the latest posts in my LT thread (click signature line). I've been clean installing W10 today and haven't decided whether to install LT IV as a kind of legacy application or not. LT say that IV is now no longer supported and yet their latest email is proclaiming the newest models for IV.
Have a look at the latest posts in my LT thread (click signature line). I've been clean installing W10 today and haven't decided whether to install LT IV as a kind of legacy application or not. LT say that IV is now no longer supported and yet their latest email is proclaiming the newest models for IV.
It's kind of interesting...I made a small test circuit in Version 17, and in version 4. Then I opened up and looked at both .asc files. Both say "Version 4" as the first line of the file. I wonder if that's for compatibility?
I wonder also, will there be certain conditions under which LTSpice 17 will write "Version 17" instead? Maybe if the file includes the new .MACHINE....
I wonder also, will there be certain conditions under which LTSpice 17 will write "Version 17" instead? Maybe if the file includes the new .MACHINE....
That's Awesome Bob. I look forward to placing an order. Is there a pre orders list at a publisher that I could put my name down on so I don't miss out on the first print of the 2nd Edition?
Hi All,
I have been reading chapter 5 of Bobs book where it explains the optimal bias condition for the output transistors (Class AB) using the Oliver’s condition. Zout(large signal) ≈ Zout(small signal) ≈ RE
Which I found all very interesting and made perfect scene to do.
My question is. Is there a similar method for selecting R1 & R2 and setting the pre-driver and driver (Class A) idle bias currents for the output stage?
(Figure 5.1b Page 99 currently shown as 10mA and 20mA)
I have been reading chapter 5 of Bobs book where it explains the optimal bias condition for the output transistors (Class AB) using the Oliver’s condition. Zout(large signal) ≈ Zout(small signal) ≈ RE
Which I found all very interesting and made perfect scene to do.
My question is. Is there a similar method for selecting R1 & R2 and setting the pre-driver and driver (Class A) idle bias currents for the output stage?
(Figure 5.1b Page 99 currently shown as 10mA and 20mA)
Hi Stuart,
There usually is some kind of pre-order arrangement, sometimes on Amazon, but I don't know what the lead time is before actual publication. Thanks for your interest in my second edition.
Cheers,
Bob
Setting the bias currents for the pre-driver and driver is somewhat more arbitrary. It mainly has to do with the ability of the transistor to turn off the next stage with adequate speed. This is especially the case with the output stage, where considerable current must be sucked out of the base to deplete the stored charge to turn off the transistor at high frequencies and high current amplitudes (e.g., high rate of change of collector current, or high current slew rate). To some extent, the more driver bias current the better, but there is a tradeoff with driver power dissipation. We do not want to let the driver lose control of the output stage. I discuss this in the output stage chapter. In some cases I'll use 60mA bias current in the driver. In EF output stages, some use a speed-up capacitor between the emitters of the driver stage in an attempt to give the driver an opportunity to act in push-pull class B operation when the driver bias current by itself is not adequate to turn off the output transistor. It allows the opposite driver transistor to actively pull current out of the base of the power transistor. This technique helps some, but has mixed results. The reason for less-than-ideal results is that in order for a capacitor to pull current, its voltage must change. It then acqures a charge that can upset conditions after the event.
Whenever you introduce a charge storage device into a nonlinear circuit, you must be mindful of unintended consequences.
Setting the pre-driver current is probably even more arbitrary, but one needs to be mindful that the driver also has turn-off current needs. I use never less than 10mA.
Cheers,
Bob
Approximate is the key word here. Simulation helps a lot. To a very rough approximation, the total bias spread for a Triple EF is 6 Vbe. However, all of the transistors have somewhat different Vbe. Using 0.6 or 0.7V for all of them will get you very roughly in range.
Cheers,
Bob
Thanks. Yes, I have learnt my lesson regarding Kindle and technical books. (I'm sorry to hear about the piracy.)
Can I ask that you suggest to your publisher that they make a better effort to make the book available in Europe? I'm going to have to try to buy the current version in paperback in the US and have it lugged to the UK.
It will definitely be available in paperback. Probably about 750 pages and 37 chapters.
Cheers,
Bob
It's available deliverable from the UK but even with the current beaten down exchange rate it's at a 73% premium (£84) to the price in the US. (I suspect you don't share in the premium!) There's a cheaper (£52) version which seems to ship from outside the UK and is labelled "International Eastern Economy edition" - I've no idea if that's the real book. Also, there would quite probably be duty and VAT (20%) to pay on this version coming from abroad.