I have even swapped out the pass transistor for one with less transconductance (e.g. IRLI530N) and the problem remains.
Even the 5V and 3V3 regulators that don't have a good number of the parts of the 12V show the same issue. (The Vref of the 5V and 3V3 is powered from a 12V voltage source. In reality the idea is to power them from the output of the 12V reg.) I can strip the circuit back to absolute basics and it persists. Is the issue inherent to a FET source follower? How real is the problem? I'm stuck.
Even the 5V and 3V3 regulators that don't have a good number of the parts of the 12V show the same issue. (The Vref of the 5V and 3V3 is powered from a 12V voltage source. In reality the idea is to power them from the output of the 12V reg.) I can strip the circuit back to absolute basics and it persists. Is the issue inherent to a FET source follower? How real is the problem? I'm stuck.
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Another line of thinking...or perhaps first decent thoughts on the subject...
There's a limit to the regulator's PSRR. Slap, for example, a 1 volt 5 MHz sinusoidal waveform on the input and it will be observed on the output, only mildly attenuated (if at all). Observing this on the output isn't regulator oscillation but simply the fact that the regulator can't attenuate at these frequencies.
Output impedance. Effectively the ability of the regulator to react to changes in load (?). It has its limits versus frequency. Slap a high frequency current load on the output and look at Vout and the regulator can't react enough to keep the voltage constant. When I look at Vout under these conditions the regulator isn't oscillating/unstable it just has a limit to its load regulation.
Am I smoking crack?
High frequency changes in load will be met, as Andrew noted, by all the by-pass caps at the load. The regulation just needs to replenish the main caps.
There's a limit to the regulator's PSRR. Slap, for example, a 1 volt 5 MHz sinusoidal waveform on the input and it will be observed on the output, only mildly attenuated (if at all). Observing this on the output isn't regulator oscillation but simply the fact that the regulator can't attenuate at these frequencies.
Output impedance. Effectively the ability of the regulator to react to changes in load (?). It has its limits versus frequency. Slap a high frequency current load on the output and look at Vout and the regulator can't react enough to keep the voltage constant. When I look at Vout under these conditions the regulator isn't oscillating/unstable it just has a limit to its load regulation.
Am I smoking crack?
High frequency changes in load will be met, as Andrew noted, by all the by-pass caps at the load. The regulation just needs to replenish the main caps.
The plot attached to post #234 appears to show that the output impedance at 5MHz is 6 milliohms. If that is true then a 1-amp sinusoidal current at 5 MHz is expected to produce a 6 millivolt sinusoid on the output. V = I*R where R=0.006 and I = 1.
If the transient analysis agrees with the AC small signal analysis, and if both agree with human intuition, then I don't think panic is a justifiable response.
If the transient analysis agrees with the AC small signal analysis, and if both agree with human intuition, then I don't think panic is a justifiable response.
Hi. Sorry I was travelling yesterday. I will try to post the LTspice file tonight. I was grappling late Sunday with the following...
While searching for ESL info on the Panasonic Os-Con caps I was planning to use for output caps I looked at Panasonic's website and found that they have provided impedance charts and Spice files for the caps. However when I plug in the Spice file in lieu of a 'standard' capacitor with Value=470u and Rser=10m, output impedance of the model collapses - massively. I don't understand this. I was expecting impedance to rise due to the impact of series inductance (for all frequencies except c100kHz which is where total impedance falls to just ESR).
I just did a basic circuit (voltage source with small signal AC=1, a cap with the Panasonic subcircuit model, and current source) to check the impedance plot of the Panasonic .subckt cap and, of course, it looks very much like the plot provided by Panasonic which I believe was created from measured data also made available by Panasonic in the same download. So I now need to go back to the regulator circuit and try to understand why using the Panasonic model makes such a difference - firstly checking I haven't made a basic mistake implementing it.
(FYI impedance plot from Panasonic attached)
While searching for ESL info on the Panasonic Os-Con caps I was planning to use for output caps I looked at Panasonic's website and found that they have provided impedance charts and Spice files for the caps. However when I plug in the Spice file in lieu of a 'standard' capacitor with Value=470u and Rser=10m, output impedance of the model collapses - massively. I don't understand this. I was expecting impedance to rise due to the impact of series inductance (for all frequencies except c100kHz which is where total impedance falls to just ESR).
I just did a basic circuit (voltage source with small signal AC=1, a cap with the Panasonic subcircuit model, and current source) to check the impedance plot of the Panasonic .subckt cap and, of course, it looks very much like the plot provided by Panasonic which I believe was created from measured data also made available by Panasonic in the same download. So I now need to go back to the regulator circuit and try to understand why using the Panasonic model makes such a difference - firstly checking I haven't made a basic mistake implementing it.
(FYI impedance plot from Panasonic attached)
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I just tested the model provided by panasonic and it looks fine. It gives approximately the same results as cap with 470u, 6.5 mOhm ESR, 6nH ESL.
Maybe your subckt connection is wrong ? check pin numbers etc.
Here is the model compared to same total price 10x EEU-FR1C221 Pana FR/FM 220u 16V at 9c each if you buy a bag of 100. It takes a lot more space but gives you a much more "user-friendly" impedance curve...
Maybe your subckt connection is wrong ? check pin numbers etc.
Here is the model compared to same total price 10x EEU-FR1C221 Pana FR/FM 220u 16V at 9c each if you buy a bag of 100. It takes a lot more space but gives you a much more "user-friendly" impedance curve...
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Ok. I had used ESR of 10m as listed in datasheet and as you previously highlighted no ESL. But, yes, I need to check everything for silly mistakes before I post the .asc.
Isn't the impedance of those caps 10x more at 100kHz? (130 milliOhms)
EDIT: I misread your 10x. I don't think there's any way I can fit 10 x 6.3mm diameter caps on the board but let me look. I am at my max board dimensions and have already had to redo it to reduce the width (i.e. rotate everything 90 degrees so that the diodes protude to the top and pass transistor to the bottom. (BTW the right compairson is 2 x SEPC470M versus 10 x EEU-FR1C221 but I take on board your point re examining the impedance profile more carefully. I was also thinking about bypassing the output caps to ensure output impedance doesn't keep raising but, as Mark might say, it sounds like polishing a coprolite. I need to get the above sorted first.)
Re cost, I have some already (and in lots of 10 they cost 56p each) but cost isn't a necessary factor.
Isn't the impedance of those caps 10x more at 100kHz? (130 milliOhms)
EDIT: I misread your 10x. I don't think there's any way I can fit 10 x 6.3mm diameter caps on the board but let me look. I am at my max board dimensions and have already had to redo it to reduce the width (i.e. rotate everything 90 degrees so that the diodes protude to the top and pass transistor to the bottom. (BTW the right compairson is 2 x SEPC470M versus 10 x EEU-FR1C221 but I take on board your point re examining the impedance profile more carefully. I was also thinking about bypassing the output caps to ensure output impedance doesn't keep raising but, as Mark might say, it sounds like polishing a coprolite. I need to get the above sorted first.)
Re cost, I have some already (and in lots of 10 they cost 56p each) but cost isn't a necessary factor.
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I ran the output impedance model with the Panasonic .subckt in place for the output caps here at the office on my Windows installation and I am not seeing the issue I had on my Mac at home on Sunday so very likely a fat finger mistake. (It was late and also I've noticed that on the Mac version if you don't exit a component's value cell after editing it then your changes aren't necessarily saved. Either way I will check when I get home tonight.)
I've attached the impedance version of the LTspice file (and necessary related files). I need to get a grip on all the caps. When I edited the Vref filter cap C1 from 470u/Rser=10m to the 16SEPC470M .subckt it whallopped Vref and consequently Vout...
I've attached the impedance version of the LTspice file (and necessary related files). I need to get a grip on all the caps. When I edited the Vref filter cap C1 from 470u/Rser=10m to the 16SEPC470M .subckt it whallopped Vref and consequently Vout...
Not had time to run the sim yet.
This cap is specced at 1.5mA leakage current at rated voltage, apparently this is included in the model. Polymer caps have high leakage, this is why you shouldn't use them as filters in high-impedance circuits (like your reference), I suggest good quality low leakage aluminium electrolytic instead...
This cap is specced at 1.5mA leakage current at rated voltage, apparently this is included in the model. Polymer caps have high leakage, this is why you shouldn't use them as filters in high-impedance circuits (like your reference), I suggest good quality low leakage aluminium electrolytic instead...
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Ugh, I hadn't even noticed the very high leakage. Now it makes sense. Are the EEUFR1C471 (leakage <0.01 CV) considered 'low leakage' or should I search for lower?
Thanks for the help. That mistake would have been very frustrating later on!
(I likely need to change some parts in my TPS3510 power control board as well.)
Thanks for the help. That mistake would have been very frustrating later on!
(I likely need to change some parts in my TPS3510 power control board as well.)
0.01CV is pretty poor.
That spec is also the maximum to indicate the capacitor has reached the end of life.
I reform my (ordinary, cheap, commercial) electrolytics very slowly and after a thorough reform I find that 0.003CV can be bettered by a factor of at least 50 and sometimes the leakage at full working voltage is down to 0.00001CV
What I don't know is how quickly the electro reverts to a higher leakage.
All electros degrade with time down to their in circuit voltage. A reform brings them back.
But that requires a partial dismantling.
That spec is also the maximum to indicate the capacitor has reached the end of life.
I reform my (ordinary, cheap, commercial) electrolytics very slowly and after a thorough reform I find that 0.003CV can be bettered by a factor of at least 50 and sometimes the leakage at full working voltage is down to 0.00001CV
What I don't know is how quickly the electro reverts to a higher leakage.
All electros degrade with time down to their in circuit voltage. A reform brings them back.
But that requires a partial dismantling.
I have a sample Panasonic FR 470u 6V3 that has been soldered and desoldered many times, took a bit of reverse bias, etc...
I charged it to 4V 5 minutes ago and measured the voltage on it a few times, I get average 0.1-0.2µA leakage, ie 0.0001CV, so the spec is quite pessimistic...
EDIT : after 20 minutes it's down to 33 nA leakage.
Minutes Current (nA)
0 .... 241
2 .... 147
5 .... 82
22 ..... 32
Andrew, you got any references of electrolytics that are specced to very low leakage ?
I charged it to 4V 5 minutes ago and measured the voltage on it a few times, I get average 0.1-0.2µA leakage, ie 0.0001CV, so the spec is quite pessimistic...
EDIT : after 20 minutes it's down to 33 nA leakage.
Minutes Current (nA)
0 .... 241
2 .... 147
5 .... 82
22 ..... 32
Andrew, you got any references of electrolytics that are specced to very low leakage ?
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I just searched Mouser for 470u 'low leakage electrolytic capacitors' in 16-20V and the search generated just one cap: the Nichicon UKL1C471KPD. Leakage is rated at not more than 0.002CV or 0.2uA whichever is greater. Certainly considerably better than my previous two choices...(There's also its 10V equivalent.)
Even at worse case leakage that's a very small drop across the 3.3k Ohm resistor and an immaterial impact to Vref (and hence Vout). Unless I missing something else I will switch to these. Same footprint as the Os-Con and so an easy change.
Even at worse case leakage that's a very small drop across the 3.3k Ohm resistor and an immaterial impact to Vref (and hence Vout). Unless I missing something else I will switch to these. Same footprint as the Os-Con and so an easy change.
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Where did you find the impedance info for the EEUFR1C221? I'm wondering of the 470u EEUFR1C471 would be a better starting point with 100kHz Z of 56mR i.e. less board space.
(Of course, I need to be mindful of the impact of changing output caps on stability margins.)
A quad FET opamp would let you continuously test four electrolytic caps on your proto-board, simultaneously. TL074 or TL084 would be a very cheap option. Test a bag of ten caps and pick the lowest leakage capacitor of the bunch. Luckily the TL0x4 opamp's common mode input range includes the top rail (PJFET inputs) so you don't need to do anything special with the charge-up.
...and 7 hours later the FM is down to 3.52 volts (initially 4.05), which averages to less than 5nA leakage. This cap has been soldered/desoldered at least 20 times, overheated, reverse biased (a little), pins bent and unbent lots of times, and generally mistreated in every possible way. The plastic sleeving is a bit burnt and has solder spashes all over.
Note that a brand new cap, out of the bag, will have a lot more leakage than a cap which has seen voltage for a while. So, if you're really obsessed about it, I suggest you grab like 10 caps from the bag, connect them all in parallel using solderless breadboard, connect to some reasonable voltage and let them reform for a few hours or days, then disconnect them all, put them on a shelf, and next day pick the winner with a voltmeter.
I used the network analyzer to measure a bunch of caps I had laying around (about 10 of each size).
Pin Spacing ... ESL
5mm ... 7nH
3.5mm ... 4.5-5nH
2.5mm ... standard alu caps 4nH, 6SEPC560MW 3nH
Damn expensive 1206 SMD facedown terminals high performance tantalum polymer ... 0.6nH
Note this does not include mounting inductance ona 2-layer board. The fixture for the thru hole caps adds about 0.5nH, which doesn't really matter a lot for a thru-hole cap. Add square loop of your PCB thickness x pin spacing. The fixture for the SMD caps adds much less inductance.
For ESR, well, the low-ESR ones are usually close to datasheet, the ones specified at 130 mOhm measure closer to 80 mOhm (well, the datasheet specifies only the max value)
So if you want to model a cap, pin spacing gives you ESL, datasheet gives you ESR (step it between like 50%-100% for medium ESR caps, or a few mOhms for oscons), and step the cap value according to tolerance.
Red or yellow plastic cube capacitors have same ESL as electrolytics of same pin spacing, so you can model them too. ESR is like 10-20 mOhms. So you can meditate on the "bypassing" of an electrolytic with a film cap, depending on the size of both, the "bypass" may be the electrolytic actually...
Note that a brand new cap, out of the bag, will have a lot more leakage than a cap which has seen voltage for a while. So, if you're really obsessed about it, I suggest you grab like 10 caps from the bag, connect them all in parallel using solderless breadboard, connect to some reasonable voltage and let them reform for a few hours or days, then disconnect them all, put them on a shelf, and next day pick the winner with a voltmeter.
I used the network analyzer to measure a bunch of caps I had laying around (about 10 of each size).
Pin Spacing ... ESL
5mm ... 7nH
3.5mm ... 4.5-5nH
2.5mm ... standard alu caps 4nH, 6SEPC560MW 3nH
Damn expensive 1206 SMD facedown terminals high performance tantalum polymer ... 0.6nH
Note this does not include mounting inductance ona 2-layer board. The fixture for the thru hole caps adds about 0.5nH, which doesn't really matter a lot for a thru-hole cap. Add square loop of your PCB thickness x pin spacing. The fixture for the SMD caps adds much less inductance.
For ESR, well, the low-ESR ones are usually close to datasheet, the ones specified at 130 mOhm measure closer to 80 mOhm (well, the datasheet specifies only the max value)
So if you want to model a cap, pin spacing gives you ESL, datasheet gives you ESR (step it between like 50%-100% for medium ESR caps, or a few mOhms for oscons), and step the cap value according to tolerance.
Red or yellow plastic cube capacitors have same ESL as electrolytics of same pin spacing, so you can model them too. ESR is like 10-20 mOhms. So you can meditate on the "bypassing" of an electrolytic with a film cap, depending on the size of both, the "bypass" may be the electrolytic actually...
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Thanks Mark. Thanks peufeu.
I spent some time this afternoon looking at various output caps and their affect on output impedance and phase/gain margin. On the face of it, while bypassing the caps with 1uF would seem to help output impedance beyond 1MHz significantly, it screws up phase and gain margins.
I also compared the use 16SEPC470M caps versus 470u/ESR=41m/ESL=4.5n caps. Re the latter my eye is on the 'low impedance' EEU-FM1C471L: 3.5mm spacing and so I just took the low end of peufeu's guidance. There doesn't seem to be much between the two actually and certainly very little with respect to output impedance below 1MHz. Perhaps actual ESL is lower for the EEU although there's not that much difference in output impedance below 5Mhz when I vary the ESL assumption from 4.5n to 3.5n. (See attached with 5A load.) Interestingly, there also seemed to be little to be gained going from 2 caps to 3 except for some yardage beyond 5MHz.
Unless I am missing something else I'm inclined to use a pair of the 'low impedance' EEU-FMC1C471L on each rail.
I spent some time this afternoon looking at various output caps and their affect on output impedance and phase/gain margin. On the face of it, while bypassing the caps with 1uF would seem to help output impedance beyond 1MHz significantly, it screws up phase and gain margins.
I also compared the use 16SEPC470M caps versus 470u/ESR=41m/ESL=4.5n caps. Re the latter my eye is on the 'low impedance' EEU-FM1C471L: 3.5mm spacing and so I just took the low end of peufeu's guidance. There doesn't seem to be much between the two actually and certainly very little with respect to output impedance below 1MHz. Perhaps actual ESL is lower for the EEU although there's not that much difference in output impedance below 5Mhz when I vary the ESL assumption from 4.5n to 3.5n. (See attached with 5A load.) Interestingly, there also seemed to be little to be gained going from 2 caps to 3 except for some yardage beyond 5MHz.
Unless I am missing something else I'm inclined to use a pair of the 'low impedance' EEU-FMC1C471L on each rail.
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There's an issue which is bugging me from a conceptual point of view. As you can see from the loop gain and phase plot, as load increases the gain crossover frequency shifts to the right and overall feedback at any point increases. Yet when I look at PSRR it falls as load increases (albeit still at very good levels). Intuitively I would have expected PSRR to improve with the level of feedback (in the same way distortion does in a power amplifier). Apart from the peaking around 6MHz output impedance decreases with extra load. (It's not due to lack of Vin headroom as a result of increased drop across the filter resistors.)
I'm struggling to rationalisewhat I am seeing in this regard.
I'm struggling to rationalisewhat I am seeing in this regard.
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