My circuit is a standard diamond output - like arrangement at approx 100 mA bias. Two pairs of output transistors in the MJL series, with the outputs a CFP arrangement. I'm still playing with it as there is a ton of current gain. Not grounding the heat sink guaranties strong oscillation as you might expect.
This is very much a prototype thing that doesn't always play nice, but when it does, it is really nice sounding.
One nice commercial example of CFP stages is in the amplifiers of the Marantz 2325. An early example as it turns out. Marantz superseded this with a basic power diamond output stage, Marantz 300DC. I'm adding the CFP to the to the base 300DC just to play. Another Diamond output stage can be seen in the Nakamichi 620. It is also intrinsically nice to listen to. I like them better than the Pass designed Stassis types that were introduced later by Nakamichi.
Misbehaving is the output current limiting because it didn't have enough static bias and being driven by tubes. The bias is provided by constant current sources instead of the more common resistor approach.
I do test them at 1 watt output into the Dale 8R 1% dummy loads that everyone used to use. I haven't tried cooking the outputs, then measuring soon after a return to the 1 watt level. Interesting test, thank you for the suggestion.
-Chris
This is very much a prototype thing that doesn't always play nice, but when it does, it is really nice sounding.
One nice commercial example of CFP stages is in the amplifiers of the Marantz 2325. An early example as it turns out. Marantz superseded this with a basic power diamond output stage, Marantz 300DC. I'm adding the CFP to the to the base 300DC just to play. Another Diamond output stage can be seen in the Nakamichi 620. It is also intrinsically nice to listen to. I like them better than the Pass designed Stassis types that were introduced later by Nakamichi.
Misbehaving is the output current limiting because it didn't have enough static bias and being driven by tubes. The bias is provided by constant current sources instead of the more common resistor approach.
I do test them at 1 watt output into the Dale 8R 1% dummy loads that everyone used to use. I haven't tried cooking the outputs, then measuring soon after a return to the 1 watt level. Interesting test, thank you for the suggestion.
-Chris
I agree. I have done this, and it is an eye-opener. In some ways it is a good example of what we don't measure with traditional static tests and yet can affect sound quality. A well-designed ThermalTrak 3EF amplifier does quite well on this test.
Here is a related interesting point. One can make an amplifier that runs hot enough at idle so that its total power dissipation does not vary very much with power, even continuous power. I call this the "isothermal" amplifier, even though it is not truly isothermal.
This may be an example of why some amplifiers that run hot sound better - there is less thermal variation, not only in the heat sinks, but also in the internal junction and header temperatures of the output transistors.
Bear in mind also that since CFP amplifiers are often run starved to try to reduce crossover distortion (by conventional static THD), they run cooler at idle, so the relative amount of temperature change with the music is greater.
It is especially easy to avoid this problem with MOSFET source follower amplifiers for 3 reasons. First, they have better temperature stability; second, they do not have an Oliver criteria that must be satisfied for minimal crossover distortion; third, you can run them as hot as you like at idle and thus approach an "isothermal-like" output stage. Energy Star need not apply.
Cheers,
Bob
This is exactly what I do... run the CPF OPS at high idle current (hot). AND, tend to run each device hot - not starved in one and high current in the other. In fact, with good device choices, running each device at same, high idle current works very well.
THx-RNMarsh
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Yep.
High Ft does not guarantee local oscillation. The question is, is it possible for the OPS to self-excite at the given frequency? In many cases no - if you disable the feedback loop you cannot get the OPS to oscillate.
The ULGF of the amplifier in the thread I linked to is around 2.5MHz.
I certainly don't have the Brass to design my amplifiers for ULGF of 20MHz.
BTW, why are you running ULGF at 20+ MHz?
A lot of small reasons, but partly just for the challenge. When you succeed you learn what others are doing wrong. And I can be more confident with designs in general having this understanding.
For sure parasitic inductances can resonate, but for oscillation there is an extra set of requirements. So, is self-excitation possible at the frequencies observed? In many cases no. The excitation comes from something other than the MOSFET's gain.
This is all possible, and normally no one bothers to ask or confirm that this is actually what is happening for a given design. And merely being inductive does not cause oscillation, it only causes resonance.
Hello everybody,
Sorry to intrude on the conversation with a "simple" question. I don't have the same level of knowledge as most of the members here .
On page 16, regarding VBe, Bob says:
"The base-emitter voltage increases by about 60 mV for each decade of increase in collector current.".
My questions is: Is this a general rule? or is this specific to the example in the text?
I would have assumed that it was specific to individual BJT's, but that is not how I read it.
Thanks for any clarification in advance.
Cheers,
Tim
P.S. If a direct quote from the book is inappropriate, I apologize
Sorry to intrude on the conversation with a "simple" question. I don't have the same level of knowledge as most of the members here
. On page 16, regarding VBe, Bob says:
"The base-emitter voltage increases by about 60 mV for each decade of increase in collector current.".
My questions is: Is this a general rule? or is this specific to the example in the text?
I would have assumed that it was specific to individual BJT's, but that is not how I read it.
Thanks for any clarification in advance.
Cheers,
Tim
P.S. If a direct quote from the book is inappropriate, I apologize
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There are indeed many things and circumstances that can cause oscillation. A resonance is neither necessary nor sufficient for an oscillation. However, in an output stage, there are numerous opportunities for the formation of Hartly or Colpitts oscillators. In general, high ft increases the possibility of local oscillations, but there are always some exceptions. You seemed to say here that the output stage cannot oscillate if the global loop is not closed. Did I hear that right? In any case, local parasitic oscillations do not depend on a global loop being closed. Emitter followers love to find ways to oscillate all by themselves
.Combine gain with adequate phase shift in a local feedback path, and you usually get oscillation. Often, a few emitter followers connected in tandem will have slightly less than unity gain. However, with a little bit of reactance in the right places, a little bit of voltage gain can be present in that path, and then one can be off to the races.
Have you succeeded in building a practical power amplifier with ULGF of 20MHz and adequate gain and phase margin over various operating conditions? If so, that is quite an accomplishment.
I agree, it is useful to push the envelope and see which barrier pops up first, then try to understand that barrier and see if it can be overcome to find the next barrier in line.
Cheers,
Bob
wondering for decision to buy your amp design book or not. I have the previous edition.
THx-RNMarsh
I use both all solid state and valve hybrid Sziklai CFP in every small signal stage.
The measured thd is below .01-.02 with excellent headroom, programmable gain and low z drive capability. The topology is not picky on parts and is very stable.
Most important is it sounds sweet too. power stage is d , tpa311x.
I built CFA with ULGF around 5 MHz and it's very stable and plays nicely.
http://www.diyaudio.com/forums/solid-state/243481-200w-mosfet-cfa-amp.html
have a nice day, Damir
Hi Richard,
Not a serious treatise. Time and space are running out. Much more space is being devoted to the following subjects, some of which are completely new chapters:
Building an amplifier - detailed construction and testing of an amplifier
Noise
full complementary JFET input stages
Advanced forms of NFB compensation
Output stages
Switching power supplies
Professional power amplifiers
There are other numerous additions and updates, but these are the big pieces.
Cheers,
Bob
Hello everybody,
Sorry to intrude on the conversation with a "simple" question. I don't have the same level of knowledge as most of the members here
On page 16, regarding VBe, Bob says:
"The base-emitter voltage increases by about 60 mV for each decade of increase in collector current.".
My questions is: Is this a general rule? or is this specific to the example in the text?
I would have assumed that it was specific to individual BJT's, but that is not how I read it.
Thanks for any clarification in advance.
Cheers,
Tim
P.S. If a direct quote from the book is inappropriate, I apologize
Yes, this is an extremely handy rule of thumb for silicon bipolar transistors and silicon diodes. Note it also comes out to about 18mV for doubling of current. This slope factor is related to kT/q and changes with temperature.
Also, interestingly, MOSFETs and JFETs have a subthreshold conduction region below gate voltages where the square law would predict zero current and zero transconductance. Plot drain current and transconductance with the ordinary LTspice model and you will see them go to zero in a way that indicates a discontinuous derivative. Mother Nature does not usually like discontinuities. This discontinuity and subthreshold conduction for MOSFETs has previously been discussed here, with references to the fix by using the EKV model or the newly introduced Ksuthres parameter in the VDMOS LTspice model (thank you, Mike Engelhardt!).
As the current approaches the subthreshold region, the FET behavior transitions from a square law to an exponential law, the latter being like that of a BJT. However, the slope, instead of being about 60mV/decade, is often in the range of 150-300 mV/decade or more. This translates to lower gm at a given current in the subthreshold region than that of a BJT.
Cheers,
Bob
Agreed. Indeed, adding risk to an amplifier design (e.g., of parasitic burst oscillations) just to get lower distortion numbers by going to very high ULGF is not wise. This philosophy also applies to pushing hard at one aspect of performance at the possible cost of others.
Examples of this might be pushing for extremely low noise or extremely high slew rate, or extremely high DF at high frequencies.
Cheers,
Bob
CFP is fine in class A stages. Not so good for class AB output stages. If you like gm doubling, bias a CFP output stage at a healthy value.
Cheers,
Bob
D. Self does a pretty good job of pointing out that balanced inputs ruin your chances of achieving 4 nV/rtHz input voltage noise. Since balanced inputs are absolutely required in the year of our lord 2016, designing for lowest noise becomes a frustrating exercise of nonstop futility.
I disagree with Doug on many things, but he is probably close to being right on this one, although I would not rule it out if I had to do it. It is just not worth it. In the worst case, without thinking hard about it, a 3dB increase for balanced to 6nV/rt Hz is achievable, and this is very good for a power amplifier. Halcro bragged very much about achieving 5 nV/rt Hz. Any power amplifier that achieves less than 10 nV/rt Hz is quite good.
Cheers,
Bob