Thanks TNT, but I don't see why it should be this complicated. My transformers have 0.4mH primary inductance and should want to see 110hm across the secondary (1:1), all I need is an adaption of the circuitry following the trafo.
Preceding the trafo should be 100pf from both pin 2 and pin 3 to chassis ground (and probably a 100 nf cap in series with the positive signal, for some reason it is only implimented in some of the inputs of the old Digidesign converters).
Can anyone explain the bias of the S/PDIF input drawing in the DAM1021's manual and why it isn't wired in a way that it effects both secondary windings equally? Is there a voltage present already on the receiving input of the DAM1021?
Preceding the trafo should be 100pf from both pin 2 and pin 3 to chassis ground (and probably a 100 nf cap in series with the positive signal, for some reason it is only implimented in some of the inputs of the old Digidesign converters).
Can anyone explain the bias of the S/PDIF input drawing in the DAM1021's manual and why it isn't wired in a way that it effects both secondary windings equally? Is there a voltage present already on the receiving input of the DAM1021?
The pulse transformer in the manual p.8 (S/PDIF connection) is for isolation and needs +1.2V from J2 to bias the input pins. TNT's drawing shows only how to convert 110R of your transformer's output to 75R for the S/PDIF input. There might be a way of how to connect the transfromer output of 110R with 2 puls formers directly to the FPGA input pins instead of going through the SPDIF but I cannot see the benefit for doing this because it would make things only more complex.
Hi Soren
I would like to purchase one of your DAM1021 boards and have email info@soekris.dk but am not receiving any reply. Is there an alternate email address that I can contact you on?
Many thanks.
I would like to purchase one of your DAM1021 boards and have email info@soekris.dk but am not receiving any reply. Is there an alternate email address that I can contact you on?
Many thanks.
No, as it says in the soekris website:
"We do our best to respond to emails and phone calls in a timely manner, but please note that due to the small size of the company, we might not be able to respond immediately. If you feel like it takes to long time, please resend your email."
I'm pretty busy right now, but will have some dam1021 in stock again very soon...
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Hello Soeren,
This is somewhat a repost from the dam1121 building thread but I’d need some comment from the designer.
Just to be on the safe side. Is this possible? 44 and 49MHz are the right frequencies?
This is somewhat a repost from the dam1121 building thread but I’d need some comment from the designer.
Just to be on the safe side. Is this possible? 44 and 49MHz are the right frequencies?
Thanks for the quick reply Soeren! Yes, it's for AES.
I'm looking forward to soldering all those tiny pins P2P...
So I installed the receiver chip for the AES/EBU digital input. Real fun soldering with the magnifying glass and it doesn't look pretty (see attached image).
But: Huge difference in sound. The converter sounds stellar now. With only this added input circuitry, good PSU filtering and proper grounding. I have yet to make recordings, but the definition and stereo image is on another level.
This input circuit should really be on the board by default (I know it is on the DAM1121).
I will make small adapter PCBs to fit on the DAM1021 PCBs for my multichannel converter now, since soldering those tiny SMD parts P2P is just messy.
But: Huge difference in sound. The converter sounds stellar now. With only this added input circuitry, good PSU filtering and proper grounding. I have yet to make recordings, but the definition and stereo image is on another level.
This input circuit should really be on the board by default (I know it is on the DAM1121).
I will make small adapter PCBs to fit on the DAM1021 PCBs for my multichannel converter now, since soldering those tiny SMD parts P2P is just messy.
Attachments
It's in the DAM1121 manual. It's really only the +/- of the AES3 signal going into the transformer primaries, the secondaries are terminated by a 110 ohm resistor and go into the inputs of the receiver chip. The Vin is bypassed to ground via a 100nf cap and the connections to the DAM1021 board are made as described above by Soeren.
I try to seperate the DIY and End User products, I did post this on SBAF:
ok, it's correct that the dac2541 reuse the case design, otherwise the differences are:
There are just two R-2R networks in the dac2541, they have then been improved, and have better voltage references. The output buffer creates the balanced output, and are using the new TI opa1656 cmos opamp. The headphone amplifier is separate, a classic composite with a opa1656 and discrete high bias diamond buffer.
The FPGA have been changed to the significant larger Lattice LFE5U-45. Still use 4K filters, but at some point I will increase the number of taps.
The USB Audio Mode 1/2 switch is gone, seems everybody is running Mode 2 anyway.
The dac2541 calibrate itself on power up, reduce THD a little and make it more consistent, and make it possible to use less precise resistors.
Power Input Plug is IEC8, just like the latest dac1541.
Firmware can be updated without opening the case, have a built in USB to Serial port using the same USB connector as for Audio.
All result in lower manufacturing cost and sale price....
The sound is still the same principle, reproduce what comes in without changing the sound. People who have listened to a dac2541 say it's very musical and clean, the best from analog records and CDs.
I took the best picture I could with my limited photo equipment while keeping the pictures size down.... But as chips are getting smaller, it's getting harder to read their labels.... The small tqfp you probably are referring to is a TI ADS131A02IPBSR, a ADC used by the calibration circuit.
Cool!
Does it re-clock behind the fpga?
Is the calibration possible to trigger on the fly - i.e. after warmup phase?
Whats the level of typical adjustment that you see?
You use the word "fully" describing that topology. What do you call the balanced one with 2 ladders per channel? 1541 is also "Our highest performance fully balanced DAC"...
//
Does it re-clock behind the fpga?
Is the calibration possible to trigger on the fly - i.e. after warmup phase?
Whats the level of typical adjustment that you see?
You use the word "fully" describing that topology. What do you call the balanced one with 2 ladders per channel? 1541 is also "Our highest performance fully balanced DAC"...
//
Of course.
No. But I haven't seen any temperature drift. I was actually planning to measure temperature (the ST uC have builtin sensor) and possible trigger re calibration, but didn't see the need....
Not as much as I expected, but the used ADC is apparently not good enough, not precise enough and have too much noise.... I'm still looking at ADCs. But the biggest advantage is that I now can used less precise resistor, which simplify logistics and make performance more consistent from unit to unit....
dac1541 has been discontinued, so out of the question. The first dac2541 text is also a first quick one....
Would it be detrimental to take power and ground from J3, either Pins 1+11 or 13+15?