SOA Calculations

Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.
AX tech editor
Joined 2002
Paid Member
Jan, I understand your remark. And this is the reason why I posted: I was quite confident that definition of non-repetitive is to let the transistor "recover" thermally from a transient, but in my application, I will supply sinusoidal or pulse waveforms, which means that the repetition rate will be the frequency of the signal.

For example, say you pass a 2.5MHz sine to a load, dissipating an average power of 0.5W at 50oC ambient across a 2SC4027, and that means that every 400ns the power through the device swings between 1W and 0W (assume zero, or near zero idle bias). At 50oC, the maximum DC quoted power is 0.8W. Would it be safe to assume that since the transient's duration is way less than 1ms every time, the only thing that matters is average power? Or is it possible that the transistor will not be able to withstand such a repetitive behavior?

I would think that in this case it is not safe. Yes, the pulse is less than 1ms, but the junction has no time to get back to equilibrium before the next pulse arrives. The 'single pulse' criterium is violated.

Jan
 
Last edited:
Well, this is my expectation too, and before I am able to go on and try this out for real, as john_ellis suggested (observing how much pressure they take until they smoke :p) I plan to use 10-12 transistors in parallel so that the expected peak instantaneous power never exceeds the permissible DC power rating, at that ambient temperature.

I would assume that buying a batch of them and putting them together will work nicely. In that sense, how critical is their matching? I am not considering THD and such effects for now, just the thermal consequence.

Since Ic is related to Vbe, I understand that the matching of the Vbe voltages would be the dominant factor governing the flow of Ic, and thus the power through the transistor, and not the hfe. Am I missing something? Of course, assuming the preceding stage can supply the total required base current to all of them, regardless of the hfe variations.
 
AX tech editor
Joined 2002
Paid Member
Well, this is my expectation too, and before I am able to go on and try this out for real, as john_ellis suggested (observing how much pressure they take until they smoke :p) I plan to use 10-12 transistors in parallel so that the expected peak instantaneous power never exceeds the permissible DC power rating, at that ambient temperature.

I would assume that buying a batch of them and putting them together will work nicely. In that sense, how critical is their matching? I am not considering THD and such effects for now, just the thermal consequence.

Since Ic is related to Vbe, I understand that the matching of the Vbe voltages would be the dominant factor governing the flow of Ic, and thus the power through the transistor, and not the hfe. Am I missing something? Of course, assuming the preceding stage can supply the total required base current to all of them, regardless of the hfe variations.

You don't need matching per se, as long as you make sure that the total current is reasonably equally shared between the parallel devices.

I don't know your circuit but a small resistor in the emitter circuit will sort of automagically ensure equal sharing, because as soon as one starts to hog current, the voltage across the Re increases which decreases the Vbe which pulls the transistor back in line. And vice versa. But it depends a bit on how much voltage you can afford to lose across Re.

Jan
 
Yes, I have included one 1Ω resistor in series with the 12 emitters. I assume that this is sufficient, rather than using twelve 12Ω resistors in parallel, correct?

The stage of the circuit is actually pretty basic, a simple push pull emitter follower. In another part of the circuit the same transistors will be used as a VAS in common emitter configuration - I assume that the principle of introducing a small resistor in series with the emitter would also do the trick there, right?
 
I would think that in this case it is not safe. Yes, the pulse is less than 1ms, but the junction has no time to get back to equilibrium before the next pulse arrives. The 'single pulse' criterium is violated.

Jan

Jan- while I am not suggesting it would be safe, the transient thermal impedance is much lower than the DC impedance. That suggests a short, repetitive pulse, as long as it stays within the junction temperature and SOA limits overall should work.
The SOA pulse limits showing almost full I-V limits at 1uS on some datasheets relies on the transient thermal impedance, and it should be possible to use a de-rated value for a repetitive pulse.
But it would need some simulations to check what the instantaneous temperature might be, along with some estimated data on the nature of the hotspots from the SOA curves, and the thermal characterisation.
There are several thermal components in the device, from the silicon chip; the solder joint, the header and package/heatsink as the main contenders. If these are known, it might be possible to say with more certainty what the effects of a short repetitive pulse would be.
 
To be clear - you want a 1 ohm resistor in series with each of the 12 emitters. Yes, 12 resistors. They don’t need to be 12 ohm. They just need to drop a volt or two at full peak current (such that the drop is larger than the variable vbe) in order to maintain thermal stability and current sharing.

You usually need an emitter resistor in the VAS too, even if it’s a single. For similar reasons - thermal stability - and to raise its output resistance. Here you probably want 12 ohms or more. I typically design for a 1 volt drop, but I tend to run things at stupid high voltages. Three tenths is another common value. Why? Because doubling it would make one Vbe, to turn on a current limiter for the VAS.
 
AX tech editor
Joined 2002
Paid Member
To be clear - you want a 1 ohm resistor in series with each of the 12 emitters. Yes, 12 resistors. They don’t need to be 12 ohm. They just need to drop a volt or two at full peak current (such that the drop is larger than the variable vbe) in order to maintain thermal stability and current sharing.

You usually need an emitter resistor in the VAS too, even if it’s a single. For similar reasons - thermal stability - and to raise its output resistance. Here you probably want 12 ohms or more. I typically design for a 1 volt drop, but I tend to run things at stupid high voltages. Three tenths is another common value. Why? Because doubling it would make one Vbe, to turn on a current limiter for the VAS.

Yes, thanks for the clarification. Sometimes I assume common knowledge that isn't ;-)

Jan
 
Well this is why I asked, because one single resistor would limit the Vbe change for all of them, so it would not be focused on each one. The only reason I considered avoiding multiple resistors was that it would introduce mismatch between the resistors, but this is not a problem for my application - I can easily use 1% 0.5W smd resistors.

Thanks for clarifying. As far as my frequencies are concerned, my base frequency is 2.5MHz at all times (sine or pulse/sawtooth), which means that for the pulse condition the rise/fall times (and so the width of the "overcurrent" pulse) will be in the order of 20ns.

EDIT: wg_ski, I am running my simulation using a 1Ω resistor in total, so this is why I proposed twelve 12Ω resistors, so that in parallel they equal to 1Ω. :)
 
Last edited:
For what it is worth - a thermal model of a device can be constructed from an RC network. Using points from a transient thermal impedance graph then the network can be constructed using equivalent pulse widths and heights. You can use Newton iteration to optimise the component values but if the input data is not consistent (for example one condition requires an R to increase while another to decrease) Newton will get confused. With a consistent input data Newton will usually find a solution (that is to say, if a solution is possible). A better approach may be to goal-seek a best-fit (like a least squares) approach rather than an exact fit which would tolerate some not-quite-consistent data.
From there you can then apply repetitive pulses and determine the power limits.
By way of example the ripple voltage (AKA temperature) on a 10us repetitive pulse was about 10V on a 90 degree rise, so with a 50% duty cycle that goes over the temperature limit (by 5 degrees in this case). Either the duty cycle has to be reduced, or the power level to less than 2x. 1.5x looks safe in this case.
Of course it also depends on whether the transistor is switching since a switch cycle means it traverses quickly from the high volts/high current to a low volts (and better SOA region). The example I used assumed that the device saw the pulse current at a moderate collector voltage. The power has to be reduced in accordance with the static SOA curves of course.
 
Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.