matching jfets

[analog_guy]

Paralleling Devices

Bear Labs,

I intend to parallel a small number of devices (2 or 4) per leg to lower the noise floor. Each group of paralleled devices can be treated as a single device. So trimming would be applied to each group as if it were a single device. Devices of a given polarity would need to be matched for transconductance, although simulations indicate that a +/- 10% matching is sufficient. The particular topology of the diffamp I am using, where the P and N section outputs are shorted together at audio frequencies obviates the need for matching between P and N sections.

 

[bear]

I think you are thinking way way too hard about this... imo.

Just build it and parallel them up. One Jfet is already quite quiet, so unless you've got a super duper low output MC cartridge it is unlikely to make a material difference in terms of audibility...

_-_-bear

 

[analog_guy]

Just build it and parallel them up.

You may be right about that. However, I am doing this analysis to satisfy the urge to do some real engineering. My current managerial responsibilities do let me do much of that any more and may best be likened to herding cats in a hailstorm.

 

[EUVL]

Scott,

Would you be kind enough to post the Spice Model you made ?


Thanks in advance,
Patrick

 

[scott wurcer]

Scott,

Would you be kind enough to post the Spice Model you made ?


Thanks in advance,
Patrick

The model blows up in a simulator, so a simple controlled source macro model does not work. I have not gotten back to this.

 

[EUVL]

Did you try one of these :

http://www.diyaudio.com/forums/solid-state/27193-borbely-fet-follower-spice-modeling.html

" *** a) Pentode model adapted for JFETs ***

* JFET models
V1 D 0 0
V2 G 0 0
B1 0 D I=12m*2/pi*atan(pi/4*V(D,0)/(V(G,0)/3.9+1.0))*(V(G,0)/3.9+1.0)**2*(V(D,0)+200)/200
B2 0 D I=12m*tanh(0.5*V(D,0)/(V(G,0)/3.9+1.0))*(V(G,0)/3.9+1.0)**2*(V(D,0)+200)/200
B3 0 D I=12m*(V(D,0)+200)/200*if(V(D,0)<V(G,0)+3.9,V(D,0)/3.9*(2*(V(G,0)/3.9+1)-V(D,0)/3.9),(V(G,0)/3.9+1.0)**2)
.dc V1 0 24 10m V2 0 -3 -1
.end

B3 is SPICE level1, B1 is much like the pentode, B2 is another interpolation nearer to B3. All matched to coincede for VDS=>0 and VDS=>inf."


Patrick

 

[scott wurcer]

Did you try one of these :

http://www.diyaudio.com/forums/solid-state/27193-borbely-fet-follower-spice-modeling.html

" *** a) Pentode model adapted for JFETs ***

* JFET models
V1 D 0 0
V2 G 0 0
B1 0 D I=12m*2/pi*atan(pi/4*V(D,0)/(V(G,0)/3.9+1.0))*(V(G,0)/3.9+1.0)**2*(V(D,0)+200)/200
B2 0 D I=12m*tanh(0.5*V(D,0)/(V(G,0)/3.9+1.0))*(V(G,0)/3.9+1.0)**2*(V(D,0)+200)/200
B3 0 D I=12m*(V(D,0)+200)/200*if(V(D,0)<V(G,0)+3.9,V(D,0)/3.9*(2*(V(G,0)/3.9+1)-V(D,0)/3.9),(V(G,0)/3.9+1.0)**2)
.dc V1 0 24 10m V2 0 -3 -1
.end

B3 is SPICE level1, B1 is much like the pentode, B2 is another interpolation nearer to B3. All matched to coincede for VDS=>0 and VDS=>inf."


Patrick

Never saw that, thanks. I lost track of the paper I was following maybe I can adapt the two together. So I should have said MY controlled source model did not work.

 

[EUVL]

Please kindly keep us updated of any progress.

Thanks,
Patrick

 

[jackinnj]

Eurequa anyone?

Download Eureqa | Cornell Computational Synthesis Laboratory

My quant son pointed it out to me --

 

[patch]

Solutioner = Eureqa = OK

Thanks again Mr. jackinnj:

Where have they been hiding this code? Where have I been? Run up against samples Eureqa resolved quickly. If this holds true with a couple of favorite blackberry brambles, I'm *not going to be mentioning it within earshot of a dear competitor.

patch