I am designing a no feedback MC amplifier using low noise JFETs (2SJ74BL/2SK170BL). Simulations indicate that the circuits yield very low distortion (< 110 dB) if each device of a given polarity is Idss matched to within ~200 uA. My question is: about how many devices of each polarity would I need to purchase to get matched quads of each polarity.
Is Idss the best FoM for matching JFETs
It occurred to me when simulating the Ids vs. Vgs curves that device matching involves more than just Idss. Vto is also involved with defining the curve. However, if one attempts to match both parameters, then the probability of getting matched devices drops quadratically, and matching may be unfeasible. Instead of matching Idss it would also be possible to match Vto. Does anyone have experience which parameter is the best for yielding minimum distortion is a zero feedback, complementary differential topology?
It occurred to me when simulating the Ids vs. Vgs curves that device matching involves more than just Idss. Vto is also involved with defining the curve. However, if one attempts to match both parameters, then the probability of getting matched devices drops quadratically, and matching may be unfeasible. Instead of matching Idss it would also be possible to match Vto. Does anyone have experience which parameter is the best for yielding minimum distortion is a zero feedback, complementary differential topology?
Sure... you're not likely to get matches of IDSS at 200ua unless you buy a huge batch of jfets, so put that idea out of your head?
If you want to match dynamic curves andidss you've got a big problem since the curves are not likely to be identical between Pch and Nch devices.
Which is why simulations and real world circuits are frequently somewhat different.
But having said all that, there are a number of nice MC front ends (head amps) using jfets.
I'd suggest you look into John Curl designs and Erno Borbely designs to start with... there are a number of other worthy ones as well. Curl is a frequent contributor in this forum.
If you want to match dynamic curves andidss you've got a big problem since the curves are not likely to be identical between Pch and Nch devices.
Which is why simulations and real world circuits are frequently somewhat different.
But having said all that, there are a number of nice MC front ends (head amps) using jfets.
I'd suggest you look into John Curl designs and Erno Borbely designs to start with... there are a number of other worthy ones as well. Curl is a frequent contributor in this forum.
http://www.diyaudio.com/forums/solid-state/135154-next-best-thing-2sk389-2sj109-2.html#post1730586
The level of match that you want, in quads, and if you also want to match Yfs on top, I would advise that you buy at least 200 pieces of each type.
Even stock 2SK389s / 2SJ109s are not perfect matches. You would need at least 50 pieces of each to find 2 pairs with closely matched Idss and Yfs amongst all 4 devices.
I am not commenting though whether your application really requires that level of match. I presume you know better than I do.
Patrick
The level of match that you want, in quads, and if you also want to match Yfs on top, I would advise that you buy at least 200 pieces of each type.
Even stock 2SK389s / 2SJ109s are not perfect matches. You would need at least 50 pieces of each to find 2 pairs with closely matched Idss and Yfs amongst all 4 devices.
I am not commenting though whether your application really requires that level of match. I presume you know better than I do.
Patrick
Matching JFETs
The matching problem is not as bad is it may appear. For the topology I am considering (See my earlier posting on no feedback MC amplifier) the outputs of N and P channel stages are AC coupled together. This has several advantages. The first is that it effectively reduces noise since the signal of interest appears equally on both outputs, but the noise from the two outputs is uncorrelated. The second advantage is that the need for matching N and P devices is reduced. It is still necessary, however, to match devices of a given polarity.
A 200 uA Idss match is required to hold distortion below 110 dB for an input of 2 mVRMS, with a gain of 15. I chose the 2 mV number based on the nominal output of a typical MC cartridge (200 uVRMS) and then adding 20 dB of headroom. It is still possible to maintain distortion below 95 dB if the Idss mismatch is raised to 500 uA.
My comment on matched quads assumes that two devices are paralleled to further reduce noise. Simulations yield an noise level of 0.33 nV/sqrt (Hz), although measurements will still be the final word.
The matching problem is not as bad is it may appear. For the topology I am considering (See my earlier posting on no feedback MC amplifier) the outputs of N and P channel stages are AC coupled together. This has several advantages. The first is that it effectively reduces noise since the signal of interest appears equally on both outputs, but the noise from the two outputs is uncorrelated. The second advantage is that the need for matching N and P devices is reduced. It is still necessary, however, to match devices of a given polarity.
A 200 uA Idss match is required to hold distortion below 110 dB for an input of 2 mVRMS, with a gain of 15. I chose the 2 mV number based on the nominal output of a typical MC cartridge (200 uVRMS) and then adding 20 dB of headroom. It is still possible to maintain distortion below 95 dB if the Idss mismatch is raised to 500 uA.
My comment on matched quads assumes that two devices are paralleled to further reduce noise. Simulations yield an noise level of 0.33 nV/sqrt (Hz), although measurements will still be the final word.
Here are some Idss figures for a batch of 12 2SK389 in the blue grade (5 - 10mA IDss IIRC). The three figures are the IDss for each half and the difference between them.
6.52 6.59 0.07
6.53 6.77 0.24
6.71 6.77 0.06
7.34 7.34 0
7.35 7.53 0.18
7.62 7.63 0.01
7.78 7.83 0.05
7.96 8.08 0.12
8.35 8.42 0.07
8.67 8.85 0.18
9.05 9.17 0.12
9.05 9.51 0.46
You can see that 10 of the 12 devices were matched within 200 uA.
Within these ten devices, the first six form three pairs where the average is matched within 200 uA, but in two cases the difference between the lowest and highest "half" is greater than 200 uA.
Assuming the same spread in 2SJ109s I think if you bought 12 of each you'd get fairly close to what you want.
If you go with 170s / 74s I think 20 of each will get you close.
6.52 6.59 0.07
6.53 6.77 0.24
6.71 6.77 0.06
7.34 7.34 0
7.35 7.53 0.18
7.62 7.63 0.01
7.78 7.83 0.05
7.96 8.08 0.12
8.35 8.42 0.07
8.67 8.85 0.18
9.05 9.17 0.12
9.05 9.51 0.46
You can see that 10 of the 12 devices were matched within 200 uA.
Within these ten devices, the first six form three pairs where the average is matched within 200 uA, but in two cases the difference between the lowest and highest "half" is greater than 200 uA.
Assuming the same spread in 2SJ109s I think if you bought 12 of each you'd get fairly close to what you want.
If you go with 170s / 74s I think 20 of each will get you close.
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Matching JFETS
A quick look at a JFET SPICE model shows that Ids depends on three device parameters: beta, lambda, and Vto according to the following equation:
Ids =beta(1 + lambda - Vds) - (Vgs - Vto)**2
To truely match devices would require that all 3 parameters be measured. I tried adjusting beta and Vto to yield the same Idss, but the results were not very good. I think that at least Vto and beta need to be matched. Vto is easy to measure, but beta is a bit more difficult. If lambda is small enough the above equation will simplify. I'll run some more sims to see if ignoring lambda is feasible.
A quick look at a JFET SPICE model shows that Ids depends on three device parameters: beta, lambda, and Vto according to the following equation:
Ids =beta(1 + lambda - Vds) - (Vgs - Vto)**2
To truely match devices would require that all 3 parameters be measured. I tried adjusting beta and Vto to yield the same Idss, but the results were not very good. I think that at least Vto and beta need to be matched. Vto is easy to measure, but beta is a bit more difficult. If lambda is small enough the above equation will simplify. I'll run some more sims to see if ignoring lambda is feasible.
Error in the Last Equation
The last equation was in error, since it failed to take into account the Rs term. Solving for Ids requires solving a quadratic equation in Ids. The expression can be simplified with the following substitutions:
A = vgs – vto
B = 1 + lambda * vds
C = (2A/rs + 1/(B * beta * rs**2)
Then Ids can be expressed as follows:
Ids = (C – sqrt(C**2 – (4*A**2/(rs**2))))/2
When I plot the simulated Ids vs the simulated Ids the two overlay nearly perfectly. The next step is to determine which of the above parameters: beta, lambda, vto, or rs need to be matched. It seems that lambda is fairly small and can be ignored. That leaves only three parameters.
The last equation was in error, since it failed to take into account the Rs term. Solving for Ids requires solving a quadratic equation in Ids. The expression can be simplified with the following substitutions:
A = vgs – vto
B = 1 + lambda * vds
C = (2A/rs + 1/(B * beta * rs**2)
Then Ids can be expressed as follows:
Ids = (C – sqrt(C**2 – (4*A**2/(rs**2))))/2
When I plot the simulated Ids vs the simulated Ids the two overlay nearly perfectly. The next step is to determine which of the above parameters: beta, lambda, vto, or rs need to be matched. It seems that lambda is fairly small and can be ignored. That leaves only three parameters.
Attachments
Nope. That's precisely why matching JFETs will do absolutely nothing for the noise.
I looked at this issue about 2 years ago -- you get a "mode" around 6.7 or 6.8mA if you examine a bag (they come in bags of 100). But the spread isn't normal -- that's probably cause they cut off the tails.
...and as Mr. Wurcer suggests, you can "effect" (within the full meaning of the verb) the distortion by trimming.
I am still puzzled why every time I measure a couple hundred MOSFETs there's a bimodal distribution of Vgst.
Ion implantation channeling (in the silicon crystal lattice) effect, the angle under which the ion beam hits the wafers is always only an approximation to the <100> planes. In particular visible in short channel devices like the 2SK170. Can be in principle annealed out, but there's a trade to other parameters. Lots of literature about, since the 80's.
Matching Jfets
syn08,
I agree that matching devices will not have any appreciable impact on the noise. The noise problem I am addressing orthogonally by means of paralleling devices and minimizing gate and source resistances.
What I'm trying to do now is to determine what jfet parameters affect the Vgs vs Ids characteristics. Once that is understood, then I can focus on determining what parameters need to be matched. Should actual parameter matching prove impractical, it may be possible to add trimming components to achieve an effective match. For example, Rs affects the Vgs vs. Ids curve. It may be possible to insert a small (0 to 5 ohm) resistor in series with the source pin to obtain an effective Rs match. My goal is to determine if a combination of actual parameter matching and trimming will permit precise matching of enough parameters to yield nearly identical Vgs vs Ids curves. I'll worry about temperature dependence next.
syn08,
I agree that matching devices will not have any appreciable impact on the noise. The noise problem I am addressing orthogonally by means of paralleling devices and minimizing gate and source resistances.
What I'm trying to do now is to determine what jfet parameters affect the Vgs vs Ids characteristics. Once that is understood, then I can focus on determining what parameters need to be matched. Should actual parameter matching prove impractical, it may be possible to add trimming components to achieve an effective match. For example, Rs affects the Vgs vs. Ids curve. It may be possible to insert a small (0 to 5 ohm) resistor in series with the source pin to obtain an effective Rs match. My goal is to determine if a combination of actual parameter matching and trimming will permit precise matching of enough parameters to yield nearly identical Vgs vs Ids curves. I'll worry about temperature dependence next.
Hi,
I had 200 off LSK170.
I found it very easy to measure and batch similar Idss.
Finding Idss matches to <0.2mA should yield ~80% to 90% of pairs. i.e.~85pairs.
I suspect the yield of quads will be very much lower, just guessing but possibly 20% i.e. ~9quads. But that is just for Idss, the easy bit to match.
I then went on to compare pairs with equal Idss, but using variable Vgs and tried to match Id. The yield of pairs is very much lower. It appears the Gm varies between the matched or similar Idss batches. Matching Idss and Gm from 25% Idss to 100% Idss reduces the yield. It looks like I was combining all your variables rather than separating them out.
If we assume all were 10mA devices then 2% matching meets your 0.2mA tolerance.
I got about 50% yield of the 85pairs that were 2% or better and about 15% yield that were better than 0.5% over part of the test current range.
Some one good with statistics could predict the chance of you finding two sets of quads from 100devices. I can't.
I had 200 off LSK170.
I found it very easy to measure and batch similar Idss.
Finding Idss matches to <0.2mA should yield ~80% to 90% of pairs. i.e.~85pairs.
I suspect the yield of quads will be very much lower, just guessing but possibly 20% i.e. ~9quads. But that is just for Idss, the easy bit to match.
I then went on to compare pairs with equal Idss, but using variable Vgs and tried to match Id. The yield of pairs is very much lower. It appears the Gm varies between the matched or similar Idss batches. Matching Idss and Gm from 25% Idss to 100% Idss reduces the yield. It looks like I was combining all your variables rather than separating them out.
If we assume all were 10mA devices then 2% matching meets your 0.2mA tolerance.
I got about 50% yield of the 85pairs that were 2% or better and about 15% yield that were better than 0.5% over part of the test current range.
Some one good with statistics could predict the chance of you finding two sets of quads from 100devices. I can't.
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We still do a backside argon damage and anneal for noise. I wonder if Toshiba needs to do anything?
In my experience you should be able to trim both offset and second harmonic to 0 by making those 4 470 Ohm resistors into 2 1K pots.
Makes sense, gettering is still a method of choice for low noise devices.
Before argon implantation or even polysilicon CVD, I used to scratch the back of the wafers with a diamond stylus
. Worked a treat!
Matching is a never ending classical topic, it feels like there appears every two weeks somebody asking how to do it or what the benefits are.
And nobody gives the search function a chance.
http://www.diyaudio.com/forums/solid-state/138852-jfet-matching-measured-distortion-part1.html
http://www.diyaudio.com/forums/solid-state/139637-jfet-matching-measured-distortion-part-2-ltp.html
Have fun, Hannes
And nobody gives the search function a chance.
http://www.diyaudio.com/forums/solid-state/138852-jfet-matching-measured-distortion-part1.html
http://www.diyaudio.com/forums/solid-state/139637-jfet-matching-measured-distortion-part-2-ltp.html
Have fun, Hannes
If you do a web search there is a paper on an improved model that matches the output characteristics of the Toshiba JFETs almost perfectly. Unfortunately it involves some functions that need to have their range limited, so when I made an LTSPICE model it blew up. With the level 1 SPICE JFET model the fit is not very good.
Matching JFETs
While Idss will give some indication of a JET's characteristics, Idss matching is not sufficient. The reason is that a number of parameters affect the Vgs vs. Ids curve. These include Vto (pincoff voltage), beta (transconductance), lambda (channel modulation) and Rs (source resistance). For 2sk170/2sj74 devices lambda is typically small enough to be ignored, but the other three parameters are not. Idss is a composite parameter and does not uniquely define Ids vs. Vgs behavior under different conditions.
With regard to really matching devices, the best one can hope for is to match one of the above three parameters and find a method of trimming out the other two. Recently I have identified a practical method for trimming Rs and Vto variations. That leaves beta, which can be obtained by measurement. I found A.S.E.E. paper (1994, session 1659) that describes how to measure all the above parameters. In simulation (at least) if beta is matched I can vary Vto and Rs, trim the variations out, and retain distortion < -100 dB. As someone stated earlier, the proof of matching is the distortion achieved in an amplifier.
While Idss will give some indication of a JET's characteristics, Idss matching is not sufficient. The reason is that a number of parameters affect the Vgs vs. Ids curve. These include Vto (pincoff voltage), beta (transconductance), lambda (channel modulation) and Rs (source resistance). For 2sk170/2sj74 devices lambda is typically small enough to be ignored, but the other three parameters are not. Idss is a composite parameter and does not uniquely define Ids vs. Vgs behavior under different conditions.
With regard to really matching devices, the best one can hope for is to match one of the above three parameters and find a method of trimming out the other two. Recently I have identified a practical method for trimming Rs and Vto variations. That leaves beta, which can be obtained by measurement. I found A.S.E.E. paper (1994, session 1659) that describes how to measure all the above parameters. In simulation (at least) if beta is matched I can vary Vto and Rs, trim the variations out, and retain distortion < -100 dB. As someone stated earlier, the proof of matching is the distortion achieved in an amplifier.
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