Which is more susceptible to jitter Multibit or DS dacs

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Jitter noise/errors being introduced depend on the frequency being output by the DAC for the simple reason that the faster the signal's moving (i.e. slewing) the bigger the amplitude error introduced by a timing error.

Since D-S by design outputs a lot of ultrasonic energy (DSD being king of the pile, being only 1bit) that energy has the capability to be 'down-shifted' in frequency by jitter.

As to particular implementations of D-S - the DACs using switched capacitors (has to be those with integrated opamps e.g. Wolfson/Cirrus) are the least jitter-sensitive.
 
Multi bit was introduced to get round DS jitter sensitivity.

Didn't Multibit come before DS???

And that paper from what I read and can understand, it seem that CT DS is very sensitive to jitter, is CT the type used in audio? If not and they're DT DS are they also sensitive to jitter? More so than ladder multibit dacs?

"However, CT ΔƩ modulators suffer from high sensitivity to clock-jitter"

Cheers George
 
George, David's talking about multibit D-S, not multibit (pure and simple). Multibit D-S uses many fewer bits (max 6, typically 5).

CT type is used wherever there aren't switched-capacitor (i.e. DT - discrete time) output stages. That means any DAC without on-chip opamps. For example ES9018, PCM1794.
 
The original R2R DACs are the least sensitive to jitter. Their weaknesses are linearity and cost. None were >16 bit and often less much in practice, with the worst problems at mid scale. Modern multi bit is a compromise, that aims to get the best of DS and the R2Rs
 
still waiting for jitter listening tests showing <10 ns threshold

https://www.hydrogenaud.io/forums/index.php?showtopic=51322&st=0

a lot of the theory assumes white random jitter spectrum for calculations

but in the real world we have quartz oscillators with low passed jitter spectrum

H I F I D U I N O: Clock in Buffalo II DAC

that should mean the highest amplitude jitter products are at small offsets from DAC output spectral components

by the 100kHz + frequencies that would give audible jitter product frequencies with Delta-Sigma shaped noise rising noise components typical quartz based clocks have <-120 dBc phase noise components
 
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And the PCM1704 is what? 14 bit?

24bit, R2R Multibit. But I don't now if it is also least sensitive to jitter also, I sure davidsrsb will let us know.?

Cheers George
 

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Yes, this one is good. Read the data sheet and look at the supply rejection, they actually dare to show it as it is excellent. DS is very sensitive to supply noise

DS is indeed sensitive to power supply noise. These days the voltage regulators that are readily available at low cost, can produce very low noise rails, which does help DS and achieves very good sound - very listenable, spacious, live with excellent extension.

It is questionable if dealing with 1704 few milliamps of its current output is less difficult than providing low noise power supply rails for DS...

Nick
 
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