Where can I tap a MCLK on the ADAU1701 to be used as the master for an external DAC, spdif transceiver, etc.?
The data sheet indicates that OSCO pin feeds an oscilator circuit which in turn feeds the MCLKI pin to establish the master clock frequency. It also states
"OSCO should not be used to directly drive the crystal signal to another IC. This signal is an analog sine wave, and it is not appro- priate to use it to drive a digital input. There are two options for using the ADAU1701 to provide a master clock to other ICs in the system. The first, and less recommended, method is to use a high impedance input digital buffer on the OSCO signal. If this is done, minimize the trace length to the buffer input. The second method is to use a clock from the serial output port. Pin MP11 can be set as an output (master) clock divided down from the internal core clock. If this pin is set to serial output port (OUTPUT_BCLK) mode in the multipurpose pin configuration register (2081) and the port is set to master in the serial output control register (2078), . . . "
Has Pin MP11 been set up with the divider to establish the MCLK output on some pin on the serial output port? Is this pin on one of the headers?
Do I just pull from the MCLK- In? Buffer?
The data sheet indicates that OSCO pin feeds an oscilator circuit which in turn feeds the MCLKI pin to establish the master clock frequency. It also states
"OSCO should not be used to directly drive the crystal signal to another IC. This signal is an analog sine wave, and it is not appro- priate to use it to drive a digital input. There are two options for using the ADAU1701 to provide a master clock to other ICs in the system. The first, and less recommended, method is to use a high impedance input digital buffer on the OSCO signal. If this is done, minimize the trace length to the buffer input. The second method is to use a clock from the serial output port. Pin MP11 can be set as an output (master) clock divided down from the internal core clock. If this pin is set to serial output port (OUTPUT_BCLK) mode in the multipurpose pin configuration register (2081) and the port is set to master in the serial output control register (2078), . . . "
Has Pin MP11 been set up with the divider to establish the MCLK output on some pin on the serial output port? Is this pin on one of the headers?
Do I just pull from the MCLK- In? Buffer?