This one has a simulated Zout of 1.6mΩ in its untweaked version, 160µΩ when tweaked, a first-order temperature compensation and really uses 4 discretes.
The PSRR doesn't shine, but it isn't particularly poor either.
It has actually been built and used
Is the 100uf/25v output cap what is keeping the output Z flat (and low) at high freqs? Also is the 5W R load on the output reducing the output Z by more that 10?
Now that I am operational again, I may do some measurements. I made a relatively crude noise measurement earlier (total of 0.25µV for a 10kHz BW) but I don't think I made impedance or PSRR ones.
As the circuit is relatively simple, the investment in spent time will be small.
We somewhat wander off-subject, but the OP could find some useful ideas (and I will post that kind of material on the <12 discretes thread, to avoid cluttering this one)
Elvee, are the measurements on the topology as of my #12 post ?
The base of the pass transistor is driven by a node that has the cathode of a TL431 and a CCS.
The CCS brings current to the base of the pass transistor. The emitter of the pass transistor is at the regulated output.
The CCS is in // with the CB junction of the pass transistor.
As drawn by Mark Johnson in post#17.
Part counts.
Pass transistor,
TL431
Voltage divider = 2 resistors.
Output capacitor.
CCS = 2 transistors + 2 resistors.
Total 8 components.
For more power, the pass transistor becomes a Darlington or Szyklai.
The CCS ( ring of 2 bjt ) is so compact and such a no brainer, I tend to consider it is 1 component. Any cheap bjt does the job, it is better to have high hfe at the output transistor.
This topology is near "low drop", this CCS is fine down to 1V drop.
The base of the pass transistor is driven by a node that has the cathode of a TL431 and a CCS.
The CCS brings current to the base of the pass transistor. The emitter of the pass transistor is at the regulated output.
The CCS is in // with the CB junction of the pass transistor.
As drawn by Mark Johnson in post#17.
Part counts.
Pass transistor,
TL431
Voltage divider = 2 resistors.
Output capacitor.
CCS = 2 transistors + 2 resistors.
Total 8 components.
For more power, the pass transistor becomes a Darlington or Szyklai.
The CCS ( ring of 2 bjt ) is so compact and such a no brainer, I tend to consider it is 1 component. Any cheap bjt does the job, it is better to have high hfe at the output transistor.
This topology is near "low drop", this CCS is fine down to 1V drop.
In this topology, there is a trick to improve headroom.
The cost is adding 2 diodes and a capacitor.
With those, I make an alternate unregulated voltage, that has a lower ripple than the main unregulated voltage feeding the pass transistor.
I use this alternate unregulated lower ripple voltage to feed the CCS.
At max current output, there is max unregulated voltage droop and ripple; Thanks to this trick the CCS gets an additional voltage that is about the peak to peak ripple voltage.
The cost is adding 2 diodes and a capacitor.
With those, I make an alternate unregulated voltage, that has a lower ripple than the main unregulated voltage feeding the pass transistor.
I use this alternate unregulated lower ripple voltage to feed the CCS.
At max current output, there is max unregulated voltage droop and ripple; Thanks to this trick the CCS gets an additional voltage that is about the peak to peak ripple voltage.
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I don't see any measurement in your #12 post?
What makes a good pass transistor in a serie regulator
Mark, I don't see that connection. A FET has normally has lower Gm than a BJT and since it is part of the loop gain, I expect the loop gain with a FET to be lower.
Jan
Jan -- referring to the schematic attached to post #17,
LoopGain = (Resistor divider ratio) * gm_TL431 * (R1 // R2 // ZIN_pass_xitor) * FollowerVoltageGain
For a BJT the FollowerVoltageGain is about 0.97 while for a MOSFET the FollowerVoltageGain is about 0.90.
However for a BJT the ZIN_pass_xitor is about 10K whereas for a MOSFET the ZIN_pass_xitor is infinity.
I believe the second effect is MUCH greater than the first. Studying Walt's all discrete design, it appears that he was concerned about ZIN_pass_xitor of a BJT, too.
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LoopGain = (Resistor divider ratio) * gm_TL431 * (R1 // R2 // ZIN_pass_xitor) * FollowerVoltageGain
For a BJT the FollowerVoltageGain is about 0.97 while for a MOSFET the FollowerVoltageGain is about 0.90.
However for a BJT the ZIN_pass_xitor is about 10K whereas for a MOSFET the ZIN_pass_xitor is infinity.
I believe the second effect is MUCH greater than the first. Studying Walt's all discrete design, it appears that he was concerned about ZIN_pass_xitor of a BJT, too.
_
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Sorry Elvee I was not clear.
I only have simulation results about the topology I am working on. My question was actually: Will you do measurements on this topology.
I have to look at that schematic. My reasoning is that a few mV drive change from the opamp at the BJT base will have a much larger effect on Iout than a few mV at the gate of a FET. That is loop gain.
But maybe your post # 17 is a different circuit than a superreg?
Jan
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I use a BJT simply because I am not familiar with MOSFET, however I understand the good reason to use a depletion type.
I am comfortable with using BJTs and TL431.
Impedance looking into the Ref input of TL431 is very high. Loop gain is not much an issue, Zout turns out to around 25 mOhm without boosting the gain with a denoiser. With a denoiser Zout becomes below the resolution of LTSpice, that calculates Zout = 0
For high current regulators the same topology with a Darlington or a Zyklay as a pass transistor get an immediate loop gain boost of 40dB thanks to the high current gain of those.
The trick I mentioned adding 2 diodes and a capacitor is only in case there is the need of a very Low Drop, this at a little cost relative to main diodes and reservoir caps.
That sounds unlikely, unless LTspice is not adequately parametrized.
Normally, you should be able to see down to the micro- or nano-ohm region
Indeed, there is something fishy in this zero Zout.
However my LTSpice calculated Zout without denoiser is consistent with calculations published on this thread.
I do a .trans analysis where I apply a load step ( 156mA ) and look at the Vout change, I then calculate D.Vout/D.Iout. What can go wrong ?
Some results:
Using a 2N2222 and I out around 600mA
Denoiser deactivated.
On an instance for Vout = 32.8V I get Zout = 27mOhm.
On an instance for Vout = 15V I get Zout = 9mOhm.
With denoiser activated, I get D.Vout = 0V.
Only if I set the headroom very low I see a couple uV change.
I tried a very small calculation time step, that doesn't change this strange result
The 2N2222 model has BF 200
I have set unregulated voltage impedance 1 Ohm.
I must miss some weird LTSpice parametrization, I was using but cannot remember.
However my LTSpice calculated Zout without denoiser is consistent with calculations published on this thread.
I do a .trans analysis where I apply a load step ( 156mA ) and look at the Vout change, I then calculate D.Vout/D.Iout. What can go wrong ?
Some results:
Using a 2N2222 and I out around 600mA
Denoiser deactivated.
On an instance for Vout = 32.8V I get Zout = 27mOhm.
On an instance for Vout = 15V I get Zout = 9mOhm.
With denoiser activated, I get D.Vout = 0V.
Only if I set the headroom very low I see a couple uV change.
I tried a very small calculation time step, that doesn't change this strange result
The 2N2222 model has BF 200
I have set unregulated voltage impedance 1 Ohm.
I must miss some weird LTSpice parametrization, I was using but cannot remember.
Making the analysis in the time-domain (.tran) is heroic: it is certainly the best method if you really want an in-depth look at the circuit, but it is also hugely taxing for the algorithms: LTspice has to see a µV step superimposed on a huge DC offset, and unless you adapt the resolution parameters of LTspice, you are not going to see much for a decent regulator.
When you just need a scalar value, the method is to load the output with a current source set for the desired current, make it AC=1 and plot the trace V(out)/I(I1) (assuming I1 is the load in question, and with an AC analysis).
You can then configure the graph to plot the linear or log value instead of dB to read the impedance directly.
You can find many examples of this method in the PSU threads.
It doesn't provide the same kind of detail (non-linearities, etc.) as a transient analysis, but it is fast and has a very high resolution without needing to alter the defaults of LTspice
When you just need a scalar value, the method is to load the output with a current source set for the desired current, make it AC=1 and plot the trace V(out)/I(I1) (assuming I1 is the load in question, and with an AC analysis).
You can then configure the graph to plot the linear or log value instead of dB to read the impedance directly.
You can find many examples of this method in the PSU threads.
It doesn't provide the same kind of detail (non-linearities, etc.) as a transient analysis, but it is fast and has a very high resolution without needing to alter the defaults of LTspice
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