This is what I meant.
When I increase them.. N channel is 3.9, p channel 50. Offset close to zero,
Temperature both vas transistor 36 deg c
When I try to increase them it will shoot up to 48
Also 550 560 is matched. Closest 5 percent
1381 3503 matched as well
470 ohm checked
Short d1/d2 junction to speaker output checked.
Last edited:
Please report voltage across the 3k3 resistor.
Voltage across R9 and R10 should be at least 100mv. That is first target to reach. Only after that you fine tune dc offset with VR1 and VR2.
Fab
Voltage across R9 and R10 should be at least 100mv. That is first target to reach. Only after that you fine tune dc offset with VR1 and VR2.
Fab
Last edited:
Pnp 1381 5.66v @3k3.
3. 9mv 10r
Npn 3503 5.55v.
50mv 10r
Suply voltage +- 38.5v
Offset close to zero
3. 9mv 10r
Npn 3503 5.55v.
50mv 10r
Suply voltage +- 38.5v
Offset close to zero
Last edited:
Your jfet current seems correct.
Can you take the voltage between base and emitter for 1381 and 3503. It should be about 0,6 vdc or so.
Also take voltage across D1 and D2.
Fab
Can you take the voltage between base and emitter for 1381 and 3503. It should be about 0,6 vdc or so.
Also take voltage across D1 and D2.
Fab
The VBE of your transistors is unusually high and quite different from each other...according to datasheet it should be about 0,65v at 25C and less at higher temperature. Unless your meter is reading also AC oscillation (check in AC reading mode) in addition to DC, I suspect bad transistors...
Fab
Fab
I had previously used bd 139 ST pair aso similar odd character
I had done this enough time by far this is the wierdest
I had done this enough time by far this is the wierdest
The VBE is intrinsic to the transistor parameter and must match 0.65vdc or so at the collector current it is used.
Are you measuring the transistor VBE directly at the B and E transistor leads?
This will remove the pcb tracks of the equation. If you are sure your parts are good then look at the pcb tracks damage or solder bridge or cold solder....
Fab
Are you measuring the transistor VBE directly at the B and E transistor leads?
This will remove the pcb tracks of the equation. If you are sure your parts are good then look at the pcb tracks damage or solder bridge or cold solder....
Fab
Last edited:
Measured at closest resistor.
OK I will try again with bd 139 140.. I got bunch of those so. Easier to. Match
OK I will try again with bd 139 140.. I got bunch of those so. Easier to. Match
That is good enough for Vbe. Hfe values are correct also and the difference in value will not affect the behaviour of amplifier.
Fab
Fab
Not really working.. Pnp side 60mv, Npn 130mv and offset stable after 10.mins . Input is hfe matched..but not vbe matched
Last edited:
Hi AnthonyA
The input transistors vbe matching has a very small effect on the overall bias values difference unless one of them is defective...
DC Offset stability should be reached quickly with bjt inputs....
As indicated previously ensure you do not measure AC voltage on top of DC voltage....
Can you post an annotated schematics with all voltage measurements and your closed loop connection shown.
Fab
The input transistors vbe matching has a very small effect on the overall bias values difference unless one of them is defective...
DC Offset stability should be reached quickly with bjt inputs....
As indicated previously ensure you do not measure AC voltage on top of DC voltage....
Can you post an annotated schematics with all voltage measurements and your closed loop connection shown.
Fab
Doesn't make sense then.. I checked all the parts in pcb.. There is nothing wrongly installed.
It starts 50mv offset and slowly drift to 0.01 by 10 mins pretty stable.
The only diff is I connected the ground of capacitance multiplier to ground using a ground break
I got a bad feeling is a bad pcb design as I contacted the local seller and he have zero answer or help
It starts 50mv offset and slowly drift to 0.01 by 10 mins pretty stable.
The only diff is I connected the ground of capacitance multiplier to ground using a ground break
I got a bad feeling is a bad pcb design as I contacted the local seller and he have zero answer or help
Last edited:
DC Offset behaviour seems ok.
Bias current still very different between positive and negative side?
You have good thermal contact with heatsink for both positive and negative sides transistors ?
What is the grounding arrangement effect?
Which pcb are you using?
Fab
Bias current still very different between positive and negative side?
You have good thermal contact with heatsink for both positive and negative sides transistors ?
What is the grounding arrangement effect?
Which pcb are you using?
Fab
Bias different both side .. Pnp is 60mv npn is 140mv
550c and 560c is hfe matched
139 140 vbe matched
J112 matched idss
DC Offset ok no drift after 10 mins.. From 50mv to 0.0x.over 10 mins.
I connected the ground of the supply to ac ground with ground break that became stable. Previously it was a little unpredictable while biasing
Good thermal contact
Voltage stable. As using cmbjt
It's a local pcb.. They Copied the design and made pcb for diyer
Should I carry on or just scrap this project? Doesn't add up..
550c and 560c is hfe matched
139 140 vbe matched
J112 matched idss
DC Offset ok no drift after 10 mins.. From 50mv to 0.0x.over 10 mins.
I connected the ground of the supply to ac ground with ground break that became stable. Previously it was a little unpredictable while biasing
Good thermal contact
Voltage stable. As using cmbjt
It's a local pcb.. They Copied the design and made pcb for diyer
Should I carry on or just scrap this project? Doesn't add up..
There is at least a fatal mistake on the pcb layout. The output transistors (N and P channels) have the same pin out but on the pcb the speaker output is connected to source on one transistor and on drain on the other one....😱
I do not know about the rest of the pcb layout but I would not have much confidence...
Fab
I do not know about the rest of the pcb layout but I would not have much confidence...
Fab
