Actually the output current can exceed the bias current. It's called class AB
But assuming your bias number of 1.3mA is correct (I thought it was a bit more), the max class A output current would be 1.3mA peak, which translates to almost 1mA RMS. That will allow almost 10VRMS across a load of 10k.
Generally output levels will be much lower than 10VRMS so that seems to indicate that the output buffer basically works already in class A.
Jan
Class AB?... never heard of it... is that a thing?...
Class A is thought limited when one side turns off when the other side doubles, and visa versa...hence the output current is 2.6mA peak or 5.2mA peak to peak. OK... only slightly better.
Of note is that the TDA1541A puts out 2mA full scale. This current is injected into the inverting terminal of an AD844 employing quiescent biasing at 1.3mA. The limit of class A operation of the AD844 is therefore 2.6mA before entering class AB, hence just above the 2mA full scale output of the TDA device.
In the configuration in this thread the input current is being equally mirrored into the load resistor, meaning that the current feeding the load at the Tz node is also 2mA having a quiescent current in this leg of 2.6mA peak. By paralleling 2 devices each device takes in and provides 1/2 of the full scale 2mA, or 1mA each into the load. By doing so the harmonic distortion decreases.
However, this can also be accomplished by a single device using modest feedback. Instead of attaching the load resistor to ground it can be alternatively increased by 2x and returned back to the inverting terminal. By doing so the 2mA current is split between the inverting input terminal and the mirrored current feeding back to the inverting terminal instead of ground, hence each leg provides 1mA as also in the case of paralleling two devices. The point is that component count remains the same without the added complexity of paralleling.
Another factor in doing so is that the characteristic input impedance as seen by the TDA1541A at the inverting terminal drops in 1/2 or about 25 Ohms with seeming only about 6dB of feedback.
We've been through this before somewhere in these pages, the sound is better when no feedback is used.
Paralleling 844's was the better option, to bring input impedance down and to steer away from current any saturation. And I believe why Mick Meloney of Supratek found with his experiments with the TDA1541, that up 6 or 8 stacked for memory 844's was ideal for it , and produced magic sounds.
Cheers George
Thanks George. To be clear, are you indicating that feedback has already been tried as directly from pin 5 (not pin 6) back to the inverting terminal with pin 5 as the output? If anyone can find this I would like to read this. Thanks
IIRC the max current for linear operation out of the Tz node is 1mA. So that is a good reason for the parallel config to be more linear.
BTW I still have a bunch of AD848's that are similar to the AD844 but have a max Tz current for linear operation of 10mA ... ;-)
Jan
Not 'take' to operate, it will operate with whatever you make it to, but it should not be more than 10mA if you want low distortion.
The AD844 should not be made to 'take' more than 1mA for linear operation.
The other difference is that the transresistance that is about 3Megohm for the 844, but a whopping 100Megohm for the 846!
Also the 846 has a factor 10 lower distortion ...
BTW I made a mistake, it is not the AD848 but AD846.
Jan
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Sorry... I meant to ask what is the quiescent operating current of the device, being indicated as 6.5mA on the AD846 data sheet (the same as the AD844). The reason for asking is that the quiescent current is an indicator of the maximum class A current available to the Tz node. If we consider that the AD844 is limited to 2.6mA for class A, the AD846 would require about 4x the quiescent current to operate in class A at 10mA, hence ballpark 25mA quiescent for the whole of the device. From this perspective these devices don't appear much different.
Of interest is that the AD844 has 5x the slew rate, 2000 as compared to 400 for the AD846. In the simplified diagram on page 8 of the AD846 it shows a constant current source feeding the middle of the output buffer. In contrast the AD844 shows a second set of current mirrors that equal the amount of current feeding the Tz node. It is thought that this permits a dramatic increase in dynamic driving current at the output to support 2000V/uSec.
Under circumstances whereupon the 3M Ohm or 100M Ohm transresistance is paralleled with a 1K Ohm load resistor, the middle of the output buffer is equally modulated by the same variant current as the load, becoming mA instead of uA under normal circumstances. This suggests that the buffer of the AD846, operated at constant as opposed to dynamic modulation conditions might work as a buffer. This is without going to something like a BUF03 for better or worse.
Sorry should have said global.
We thought that the nasty noises "VHF glitches" ect that come out of dacs outputs, caused maybe instability and raises the settling time with feedback applied.
Just like most amps, the less feedback the more stable the more feedback the less stable.
Cheers George
I never understood that, it was not more expensive and better in almost all parameters.
I once discussed that with Barrie, he said he had an even better design on the shelf but it would stay there unless a big customer turned up.
Jan
I understand what you are saying, and agree that the 10mA output will not be in class A. Yet the curves are what they are.
I would not read too much in the differences in basic schematics, these are to a large extend conceptual and cannot be relied upon for detailed internal circuit. The high transconductance is not important in all applications, true, but the high value indicates that the internal gain and linearity is large. That's a Good Thing.
But it is obsolete anyway, so only of interest as an intellectual exercise.
Jan
At the end of the day you are better off just building a discrete version. I've
built a few of them for DAC's and other applications. They sound much
better as you can pimp the IP stage and OP buffer quiescent current up to
something that actually achieves decent linearity. These chips are current
starved for OL operation because they are designed for closed loop.
Can also increase the supplies = less voltage modulated capacitive induced distortion.
It's a lot more work and you need a servo to control OP offset but sonically,
I think, worth the effort.
T
As an intellectual exercise it is interesting to speculate why the AD844 survived and the AD846 didn't. It can be that to achieve 100M Ohm trans-resistance the trans-capacitance increased as a function of added circuit complexity at the Tz node. As a result the slew rate suffered. Applications that required high DC accuracy (a claim promoted by the manufacturer in the AD846 data sheets) being in conjunction with wide bandwidth of a CFA gave way to the AD844, as still possessing excellent DC characteristics in conjunction with 5x slew rate. This can be what sent the AD846's to seek "daily affirmations" from the moth balls.
The AD846 was designed by Barry Hilton and Wyn Palmer. The design trade offs simply didn't find big customers. These parts were on the first complementary process subsequently the processes got faster and the extra circuit nodes coming out became an applications nightmare. First silicon on one chip had an oscillation due to the bond wire L and package C at IIRC 700MHz.
BTW the CEO of a boutique CD maker came in personally to ask for private numbers on AD841's as I to V's.
I once asked a big shot at ADI why not more CFAs with the Tz node brought out to a pin, that would make it so much more flexible!
Turns out that the couple of extra pF of an external pin could decrease the bandwidth so much that the performance suffered.
Jan