Ultra Low Noise JFETs from Texas Instruments

[KSTR]

But how is matching done if they are on the same substrate?

Same silicon and process means same parameters, so the matching is sort of intrinsic. There is no additional matching. But TI seems to do selection (select dies with less than 4mV offset for JFE2140, and the duds will likely become JFE150 singles).

 

[Mr.Knackwurst]

I think TI disclosed the 150 is the exact same die as the 2140, just pre-bonded for devices in parallel. The catch diode pins are a giveaway for that, too.

Interesting note from Interfet about crosstalk: https://www.interfet.com/jfet-application-notes/thermal-soic-8-package-jfets-at-interfet/
There actually could be some interference. Let's wait what TI has to say.

After comparing the datasheets, 150 and 2140 are slightly different. My first impression was that 150 is the same die with paralleled 2140 FETs... 😀

 

[Mr.Knackwurst]

I think TI disclosed the 150 is the exact same die as the 2140, just pre-bonded for devices in parallel. The catch diode pins are a giveaway for that, too.

Interesting note from Interfet about crosstalk: https://www.interfet.com/jfet-application-notes/thermal-soic-8-package-jfets-at-interfet/
There actually could be some interference. Let's wait what TI has to say.

Oh sorry, I got you wrong. You also said that they are bonded in parallel.

 

[gerhard]

That was clarified in post #247 by JohnC124, an TI FAE when I asked.
Gerhard

 

[Bonsai]

Thanks for your thoughts and if so, you are absolutely right. But how is matching done if they are on the same substrate?

The matching comes as a consequence of fabricating them at the same time and on the same wafer ie it’s just like the input devices on an opamp.

 

[Mr.Knackwurst]

The matching comes as a consequence of fabricating them at the same time and on the same wafer ie it’s just like the input devices on an opamp.

Thanks, with the added understanding that the pairs that are not a close match can be used as 150, that makes sense. Thanks for the clarification, I'll not use a single 2140 for both inputs.

 

[Mr.Knackwurst]

Ti responds that they have no crosstalk data to share. Both JFETs are on the same chip and share the common substrate, so their biggest advantage is matching. Many other dual JFETs are separated according to Ti's statement.

Many thanks to all of you!

 

[sawyers]

Matching of FET characteristics for sure. But having them both on the same piece of silicon also ensures thermal tracking.

To ensure tracking on multiple discrete FET's I've ended up clipping them onto a common aluminium bar.

 

[Mr.Knackwurst]

https://e2e.ti.com/support/amplifie...iers-forum/1420050/jfe2140-jfe2140-capacities

A link about some interaction between the JFET pair and the common substrate provided by TI as a reference.

 

[KSTR]

https://e2e.ti.com/support/amplifie...iers-forum/1420050/jfe2140-jfe2140-capacities

A link about some interaction between the JFET pair and the common substrate provided by TI as a reference.

Confirms what I mentioned in post #296

 

[Mr.Knackwurst]

Confirms what I mentioned in post #296

...and it confirms, that there is an internal "connection" that may make issues depending on the use and voltage levels of both Fets.

 

[KSTR]

...and it confirms, that there is an internal "connection" that may make issues depending on the use and voltage levels of both Fets.

If you put the clamping terminals at AC grounds as recommended then that measly 1pF of additional stray capacitance is rendered ineffective. In a diff amp one might even bootstrap them.
Thermal (low frequency) coupling is the thing to watch with these monolithic dual JFETs.

 

[Mr.Knackwurst]

Hi again. Does anybody have a recommendation for the upper FET of a 2140 cascode at a MM phono input? Supply voltage is about 20V. Any experience using 2x2140? This is shown in the datasheet, but didn't match to some basic considerations here.

https://www.preamp.org/static/cascoded-jfet-current-source/index.html

 

[zincho]

Adopt the input stage of JFE-2140.