Yes, it's dirty, but it works (in most cases) 🙂
You could insert a R-C-element between eprom output D1 and /reset (you have the time of 1 sample = 32 sclk-periods, because output D0 is always 0) or you must latch the signal. In my circuit it works without.
I think that emuman100 is informing us about his problems, so that we could find problems and solve them.
Maybe I should re-design the whole circuit, so that it is fool-proof to work for all. For me that was never needed.
(It's dirty too, that the data-output isn't latched ...)
Regards
Jobstens
You could insert a R-C-element between eprom output D1 and /reset (you have the time of 1 sample = 32 sclk-periods, because output D0 is always 0) or you must latch the signal. In my circuit it works without.
I think that emuman100 is informing us about his problems, so that we could find problems and solve them.
Maybe I should re-design the whole circuit, so that it is fool-proof to work for all. For me that was never needed.
(It's dirty too, that the data-output isn't latched ...)
Regards
Jobstens