Here is my take on a layout for a balanced buffer with low pass filter: From this schematic ...
... I made this PCB layout:
This illustratetes my thoughts:
I imagine the distribution of signal and power currents as displayed.
Does the picture reflect reality or am I thinking wrong?
Are there any drawbacks in this layout?
... I made this PCB layout:
This illustratetes my thoughts:
I imagine the distribution of signal and power currents as displayed.
Does the picture reflect reality or am I thinking wrong?
Are there any drawbacks in this layout?
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As far as I can see you have done this very well. The power return currents do not intrude into the area where the signal return currents flow. Excellent!
Personally, I would go one step further and label the ground points in the schematic with two different symbols: for the power grounds I would use the symbol you used (with the horizontal stripes) and for the signal ground I would use a different symbol like a triangle.
The advantage is that when you transfer the schematic to the PCB layout program these two ground nets would be two different nets in the layout program. You can then route them as separate nets, and at the final step connect them together at a single convenient point.
jan didden
Personally, I would go one step further and label the ground points in the schematic with two different symbols: for the power grounds I would use the symbol you used (with the horizontal stripes) and for the signal ground I would use a different symbol like a triangle.
The advantage is that when you transfer the schematic to the PCB layout program these two ground nets would be two different nets in the layout program. You can then route them as separate nets, and at the final step connect them together at a single convenient point.
jan didden
Thank you, Jan.
The schematic is a partial copy of the CS4398 datasheet. So your advice goes to the Cirrus folks ...
I'm using the most basic layout prog, it can't handle netlists and other advanced things. But as I'm about to design my own DAC with DIR9001, CS8421 and CS4398, it is time for a change.
Regards,
Gerd
The schematic is a partial copy of the CS4398 datasheet. So your advice goes to the Cirrus folks ...
I'm using the most basic layout prog, it can't handle netlists and other advanced things. But as I'm about to design my own DAC with DIR9001, CS8421 and CS4398, it is time for a change.
Regards,
Gerd
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