Nope. There are two, just hard to see. 200 ohms will not do it, so i have to use bigger pot or put resistor in series. Didnt feel like messibg with it after i couldnt get bias up, so i will finish tomorrow. All else is good, functioning as expected. Tomorrow should go quickly.
Ikebana!
Looks like my bench. But neater.
Don't be afraid to use clip leads....
OK. Irritated now. Cant figure out what is wrong. Cannot bring bias up past about 1V. If I check the FE independent of the output transistors, all is fine. Attaching output transistors, I have 56V across Jfet until i bias it up and then everything levels up and I have 27V across both top and bottom fets. From there it goes nowhere. cat bring gate voltage pass about 1V. What is stealing my current? I have the negative input shorted to ground. Can get the offset close to zero, then it starts to wonder. Dont have the feedback point bypassed with cap, so ill try that to stop the wandering output.
Tea,
your schematic is too small to see.
ZM,
I am using the schematic from earlier in the thread given to 6L6. Fe is fine as far as I can tell. Found a little clue when testing bjt in ACS for Vdrop. When i connected one probe to the output and one to the gate of the bjt, all the sudden bias came up. I am assuming this points to bad bjt.
your schematic is too small to see.
ZM,
I am using the schematic from earlier in the thread given to 6L6. Fe is fine as far as I can tell. Found a little clue when testing bjt in ACS for Vdrop. When i connected one probe to the output and one to the gate of the bjt, all the sudden bias came up. I am assuming this points to bad bjt.
Attachments
Ok, so I got one side biased up, but new problem has presented it's self. With Vdrop at about 600mV, I get big negative offset at output of about-22V. It seems like top Hal is not matching bottom half in current. I can begin to trim it out, but bias gets way to high on SS.
with biasing , you're still in DC domain , strictly
I'm saying that , understanding "contribution of ACS to output" as AC thing
take it from this angle - you're gonna to adjust Aleph CCS for desired current ;
then - chasing 0 DC offset on out , you're gonna to adjust it's load ( lower half of amp ) ........ looking at it as on variable resistor ;
R too small - offset in neg
R too high - offset in pos
considering that A CCS is pumping same current in both cases
do not forget to gnd both inputs
I'm saying that , understanding "contribution of ACS to output" as AC thing
take it from this angle - you're gonna to adjust Aleph CCS for desired current ;
then - chasing 0 DC offset on out , you're gonna to adjust it's load ( lower half of amp ) ........ looking at it as on variable resistor ;
R too small - offset in neg
R too high - offset in pos
considering that A CCS is pumping same current in both cases
do not forget to gnd both inputs
Last edited:
both inputs shorted to gnd
it seems you made some other mistake there
without my presence right above your shoulder , or without pics - it's hard to say
edit : - you posted another one , while I typed
clarify
editedit:
got it - there is no connection to bjt base in A CCS , that way
it seems you made some other mistake there
without my presence right above your shoulder , or without pics - it's hard to say
edit : - you posted another one , while I typed
clarify
editedit:
got it - there is no connection to bjt base in A CCS , that way
Last edited:
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