While reading through a lot of the posts in this thread, I had seen some mention of using a higher voltage transformer for the output transistors and then one within spec for the TDA chip for it. Has anyone tried this?
I have a large transformer with 80V CT secondary (40-0-40) which would be way too high for the TDA, but it has other windings of lower voltage/current supply as well that would likely fall within the TDA's range. Would there be issues or oddities by using a dual-supply setup? Any special considerations with either the original version or the enhanced one?
I have a large transformer with 80V CT secondary (40-0-40) which would be way too high for the TDA, but it has other windings of lower voltage/current supply as well that would likely fall within the TDA's range. Would there be issues or oddities by using a dual-supply setup? Any special considerations with either the original version or the enhanced one?
Driver side power supply must be always *higher* than or equal to power stage rail voltage. Maximum recommended level difference is 0.7V if the driver side falls below the input side.
See the ST application note for details and the execution of the Class-H power amplifier in particular.
Using it the other way around will destroy the chip. This also has some implications for turn-on time constants of the two stages if using independent supplies.
See the ST application note for details and the execution of the Class-H power amplifier in particular.
Using it the other way around will destroy the chip. This also has some implications for turn-on time constants of the two stages if using independent supplies.
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Perfect answer! Thank you!
I had a feeling that it would be something like that, and it completely makes sense. I'm still learning (aren't we all) and have no formal training, but do lots of reading before trying anything and usually am pretty lucky with the outcome.
That said, if someone makes a PCB for the enhanced circuit, I would be very interested.
I meant to say if the driver side falls below the OUTPUT side.
I do have PCBs coming, but I have yet to receive them. If they test out okay I'll update the thread.
Are you confirming that your 2pair output stage gave 26Vac/36.77Vpk and 13Aac/18.38Apk (338W into 2r0) when measured with that ±51Vdc supply?
And you measured 26.98Vac/38.16Vpk, 26.98Aac/38.16Apk when delivering 728W into 1r0, again from ±51Vdc?
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24Vac should give aound ±34 to ±36Vdc
subtract 3 to 5Volts for supply sag and increasing ripple when max power is delivered.
subtract 3 to 5Volts for losses through the amplifier when delivering max power to resistive load.
This gives a maximum output of very approxiamtely 30Vpk (highest) to 24Vpk into an 8ohms load. Pmax=Vpk²/2/Rload
That equates to 56W to 36W
Easy arithmetic.
subtract 3 to 5Volts for supply sag and increasing ripple when max power is delivered.
subtract 3 to 5Volts for losses through the amplifier when delivering max power to resistive load.
This gives a maximum output of very approxiamtely 30Vpk (highest) to 24Vpk into an 8ohms load. Pmax=Vpk²/2/Rload
That equates to 56W to 36W
Easy arithmetic.
Hello,
regarding the first aim of this setup : simplicity, I don't understand the utility of the RC network tied to pins 9&10. From the highly regarded ESP ressource we can see pins 9&10 tied straight to V+ :
Project 127
Thanks for any input
regarding the first aim of this setup : simplicity, I don't understand the utility of the RC network tied to pins 9&10. From the highly regarded ESP ressource we can see pins 9&10 tied straight to V+ :
Project 127
An externally hosted image should be here but it was not working when we last tested it.
Thanks for any input