As the title says, how would I go about doing this? The easiet way, I presume, would be to output a SPDIF signal carrying the clock / bit depth / etc. data from the CS1842 receiver chip and send it to the SPDIF input of my sound card (the HDSP 9652). Is there any reason why this wouldn't work?
Here's the card's (not very technical) manual, in PDF format.
Here's the card's (not very technical) manual, in PDF format.
Yes
Check out this link to RME site
I haven't done this but it appears you can do exactly as you plan.
-Robert
Check out this link to RME site
I haven't done this but it appears you can do exactly as you plan.
-Robert
First a few words.
1. Consider this schematic a starting point.
2. If I had to do this I would use a CPLD or more likely a FPGA.
3. It is probably unwise to drive 4 inputs with the Q4 output of
IC2 without a buffer but I wanted a small image file.
4. Ulas would probably disapprove of my picayune effort.
The schematic.
1. Consider this schematic a starting point.
2. If I had to do this I would use a CPLD or more likely a FPGA.
3. It is probably unwise to drive 4 inputs with the Q4 output of
IC2 without a buffer but I wanted a small image file.
4. Ulas would probably disapprove of my picayune effort.
The schematic.
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