Hi! I have built a MOSFet cap multiplier to filter valve amp B+. Here's the schematic:
Real life DC behaviour on the bench matches the simulation closely.
I have a meter on the load resistor and a meter on the output of the PSU powering it. It is an old unit with an indirectly heated full wave rectifier, so comes up slowly.
The cap multiplier has the typical slow startup from the time it takes for C1 to charge. At the point where that is nearly finished and Vin starts to drop, there is a click sound to be heard from the cap multiplier and Vin jumps up to 1kV for a moment. Unloaded Vout of the psu is 510V, under load 484.
Do any of you have an idea where that spike is coming from and how to suppress it?
Thanks for any useful input.
Real life DC behaviour on the bench matches the simulation closely.
I have a meter on the load resistor and a meter on the output of the PSU powering it. It is an old unit with an indirectly heated full wave rectifier, so comes up slowly.
The cap multiplier has the typical slow startup from the time it takes for C1 to charge. At the point where that is nearly finished and Vin starts to drop, there is a click sound to be heard from the cap multiplier and Vin jumps up to 1kV for a moment. Unloaded Vout of the psu is 510V, under load 484.
Do any of you have an idea where that spike is coming from and how to suppress it?
Thanks for any useful input.
I put a 1N4007 across drain and source (cathode on drain) which increased the voltage spike from 1kV to 1kV3. Just randomly turning the diode in the other direction hoping for the best seems wrong.
Part of the problem probably is that gate threshold voltage of the FET is reached rather late. Is there a way to fix this while still keeping the CCS?
It's very weird. Weird behaviour is often related to oscillations, but there is no overall feedback and you do use gate stoppers.
The input voltage jumps up to 1 kV and then goes back to normal... Have you got a schematic of the supply that supplies the input voltage and if so, could you post it? What load is there on the output? Does it behave better with maximum than with minimum load?
The input voltage jumps up to 1 kV and then goes back to normal... Have you got a schematic of the supply that supplies the input voltage and if so, could you post it? What load is there on the output? Does it behave better with maximum than with minimum load?
High Marcel, thanks for getting back. The gate stoppers are dry carbon comps, with their bodies soldered as close as physically possible to the bodies of the transistors. The values of input and output capacitor are not random but were chosen to make sure phase is in order.
I would have to open up the supply to trace the circuit. Relevant might be that it is a CLC supply, meaning there is an inductance that possibly discharges the moment gate threshold of the pass FET is reached.
Load on the output is an 8k resistor. I'll have a look what happens with different loads and maybe try a damping resistor at the input of the multiplier.
I would have to open up the supply to trace the circuit. Relevant might be that it is a CLC supply, meaning there is an inductance that possibly discharges the moment gate threshold of the pass FET is reached.
Load on the output is an 8k resistor. I'll have a look what happens with different loads and maybe try a damping resistor at the input of the multiplier.
Increased load R to 14k: no change. Lowered Rload to 5k: no change.
80R in line with the multiplier input: no change.
80R with 12 turns of nichrome wire in parallel: no change.
Unfortunately, I haven't a clue what is going on. Let's hope someone chimes in who has an idea about what it might be.
The inductor may be causing the voltage spike, due to a bad connection or arcing.
Try substituting a high power resistor (of the same DC value as the inductor) for the inductor and see if the problem is gone.
Perhaps post the ASC files and parts with .include statements and let others see the behavior in spice. I am very puzzled and have no plausible explanation. I am very interested in understanding what is going on.
I had understood he sees this in the simulation as well, or did I misinterpret something? I think perhaps that is not what he meant.
Hi Kevin, I have only seen this on the bench with the actual circuit. I'm not smart enough with Spice to model the start up behaviour...
Here's the .asc. The forum software doesn't seem to let me attach .lib files.
I have changed the FET for a MSC750SMA170B (higher Vds), behaviour is the same.
I have changed the FET for a MSC750SMA170B (higher Vds), behaviour is the same.
See post #8 - if you missed it.
Sounds like inductor "kick-back" voltage, from interrupting its current.
Or just try a different power supply.
Sounds like inductor "kick-back" voltage, from interrupting its current.
Or just try a different power supply.
I wondered about that in post #5. I'll take out the inductor and replace it with a resistor and try again. As the amplifier wthis was supposed to go in has a lot of L in it's supply, is there a proper way to deal with that kick back? Damping diodes across the inductor?
Thanks for the input.
Thanks for the input.
A reverse HV diode across the inductor is the usual way to deal with it.
I tried a 90V Zener with a 1k resistor between C1 and multiplier input. That prevents the hard turn on and it starts up smoothly now.
Inductor + switching device = kickback. Hence the need for the free-wheel diode across the inductor. Not sure what the inductor does, other than risk over-voltaging the drain of the FET and sending it into avalanche-breakdown, and limiting the bandwidth of the regulator, no need for it in a linear regulator circuit like this.
What switching device? I just see a current source, an RC parallel network and a source follower.
A MOSFET is a switching device, given the high voltages involved a small transient could be enough to cut-off the MOSFET (don't forget the gate is coupled to the drain capacitively, so dV/dt on the drain can work to do this).