Strange bias problem

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Hi,

I'm working on an amplifier and I've just finished the first prototype board. When it's still biased in class C, it works very fine. Virtually no DC offset and a sine wave coming out when it needs to be.
I first tested everything with the output stage connected to check whether the input stage and VAS was OK. I could turn the bias al the way up and it all worked fine. So I connected the output stage. Turned the bias down and check. Everything OK. I slowly turned up the bias to put the amp in class B. At a sudden point, the output stage starts to conduct, but the negative rail draws a lot more current then the positive rail. I checked all currents and voltages and found out that the VAS condcts a high current from the collector of the darlington pair (grounded) to the negative rail.
In the attached pdf I put in some measurements with lowered supply rails, to make sure it won't go into holy smoke, but the problem is the same. When I remove R13 and R30, everything is fine again, so it has something to do with the output.
Does anybody have an idea why the VAS behaves this strange?
Thanks in advance.

Kind regards,

Remco Poelstra
 

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Hi Thoru,

1) Your frequency compensation doesn't look familiar to me, it looks like TMC but the resitor R35 is coupled to the negative rail instead of the diff input pair (base of Q8C).
2) A darlington VAS is not always perfectly stable, could it be that the amp is oscillating? Keeping remark nr 1 in mind.

Besides this, everything looks fine (for me, definetily not an expert).

BTW, where did you get the THAT devices from, PROFUSION?

My :2c:
 
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Hi,

Thanks for your answer. I don't know about TMC, bit this one is "pole splitting".
I checked for oscillations, as the amplifier has high distortion and phase-inversion behavior as well, but I could not detect any oscillations up to 100MHz (my scope's limitation).

Yes, the that devices are from profusion.
 
bias and setting up of the amplifier is done with the input shorted and the external loads disconnected.

Now look at the output node where the output transistor resistors meet up.
Where can currents flow from? Where can currents flow to?
From the upper devices and to the lower devices, with a little flowing through the NFB loop.
You cannot have a large imbalanced output device current. You have set it up using the wrong method.
 
Hi AndrewT,

Yes, I had the input shorted and only a scope connected to the output. The current imbalance isn't caused by the output stage. The large current in the negative supply rail comes from the VAS. Thats the strange thing. It seems the input stage drives the first VAS transistor to correct the slight DC offset and the second VAS transistor is driven by the first one, thus Q13 start to conduct a large current. Unfortunately, that somehow does not result in a voltage amplification. The VAS transistors are not broken. I replaced them and checked the old ones. Behaviour was the same and the old ones were still fine.
As you can see in the schematic, the bias circuit only conducts about 5mA, while the VAS supplies 60mA.
The problem with the output stage is that in somehow stops the VAS from working properly.
Please also note that with the voltages and currents given, the output stage is hardly conducting.

Regards,

Remco
 
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As this is a Triple OPS it is very prone to oscilation. Try 220pF connected between base and collector of the drivers(MJE15034/35). I had similar problem with my triple.
You need base resistors for drivers and output transistors. I noticed that you have almost the same current trough predrivers and drivers, normally predrivers have lower current
I suggest that you connect R35 to the 0V(ground), better PSRR.
dado
 
My impression is that Dadod is right on this one. With triples you either have excellent layout with very short paths and base resistors or you go the route Dadod suggests.
First I would use around 3 ohm base resitors with the output transistors as well as use base resistors with the drivers. As temperature compensation is little more sensitive with triples I also suggest you upgrade your bias arrangement, use a darlington or any other high beta low voltage app 40v transistor, 15034 s beta is too low and takes too long to react to temp changes. The current variations through the vas will be sustantially less too when it comes to rail sagging at higher power levels.
 
C12, as large as it is, with no series resistance at all, between emitters of Q11 and Q22, is a little scary from an oscillation point of view.

When everything else is sorted out, you will find that any time you drive to clip at the negative rail, that Q12 and Q13 will become very hot. The Q12/Q13 combination needs either an active current limiter, at least a resistance in Q12's collector to limit dissipation. The reason is, that if you ask for an output voltage that is more than can be delivered, the input diff pair will dump current into Q12's base, making for lots of collector current...

Note that this condition will certainly happen anytime you clip to the negative rail.
 
It seems that at the moment I already have something like that overcurrent problem, where q12,13 conduct a lot of current, with no noticable effect on output voltage. The final schematic will have a transistor that senses the current through R37 and draws current away from the input stage. But I first would like to see it working without additional protection circuits (within normal limits of course), so I'm still working on all the suggestion given above.
 
Made some good progress.
After trying some things out, with no results, I tried to actually see the oscillation. That worked and enabled me to make it stable. 100Ohm and 220pf for each driver did the job. I think I'll add a few ohm for each output transistor as well. Now I've to verify that it will remain stable when loaded non-resistive as it once has to power an ESL.
 
Tried putting a capacitor from base to collector for the drivers. That works equally well.
At the moment I do not yet have base resistors for the output transistors, but it seems all stable. I tried loading the amp with 4u7F, and although it gives some overshoot on a square wave input, it does not start to oscillate. Please note that I only measured the output stage, the input and VAS are disconnected (hence there is no feedback), and the output inductor is in place.
I think I can assume the amp is stable this way. In the final version I'll add base resistors to the output devices as well, just to be sure.
Next one is improving the bias circuit, as it's indeed very very slow at the moment.
 
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