SRC Ad196 is always muted

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Hi,

i´m curently developing an audio DAC device with an AD1896 smaple rate
converter to reduce jitter. The input data comes from a Cirrus Logic CS8416 SPDIF reciever and seems to be correct.

Now my problem is that the MUTE_out pin of the AD1896 is always asserted high.
I have 24 MHz input at the MCLK pin, 6 MHz at the SCLK_in, about 1,2 MHz at
SDATA_in and 48 kHz at LRCLK_in.
SCLK_out is also 6MHz but at LRCLK_out and SDATA_out is no signal. MUTE_in is
connected to a microcontroller and is programmed to be low all the time.
In the datasheet is said that MUTE_out is high during reset or if there is a change between LRCLK_in and LRCLK_out. As i have no signal on LRCLK_out that might be the cause but why isn`t there anything on the LRCLK_out?


The AD1896 is configured to get left justified input and right justified output data. Word length is 24 bit and the MMODE is Master(256xfs).



Can you help me to find out why the AD1896 isn`t working?
 
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