Sonic Impact of SRCs

Status
Not open for further replies.
Finishing the prototype of my DAC5 project (soon to be published on "http://www.diyaudio.de/html/projects.html") I made an interesting experience comparing two different modules for this DAC:

Module #1: DIR1703 - AD1896 - PCM1730
Module #2: DIR1703 - PCM1730

Master clock is provided by a 45,1584 MHz crystal oscillator provided by Guido Tent divided by a chain of 74AC161s, auxiliary clock for the SRC is provided by an ordinary canned 30,0 MHz crystal oscillator. IV-conversion is done using four homemade discrete CFB-opamps in a non-NFB configuration feeding a pair of Lundahl LL1582 transformers.

The unexpected result of my sonic comparison is that module #2 (without SRC) sounds distinctly better! Differences are:

- Soundstage more detailed, accurate, wide and deep
- More low-level details and dynamics
- Greater palpability

The results might be depending on the transport used (I'm using a Teac VRDS-25X).
My conclusion is that the DIR1703 already does an excellent job reducing incoming jitter and that the AD1896 isn't able to improve anything here and therefore negative artefacts of the upsampling process are becoming obvious.
Anybody of you guys made a similar experience?
 
The unexpected result of my sonic comparison is that module #2 (without SRC) sounds distinctly better! Differences are:

----------------------------------------------------
This is the conclusion I eventually reached with the Assemblage D-2-D and other CS8420 based SRCs. The twin pll dejitterer actually works better without SRC. SRCs can give the impression of improvement but are far inferior to say the dCS972 and Purcell.
These truly show the benefits of upsampling and a 972/954 duo at 24/276.4 ot 24/192 truly impoves 16/44.1 to the point of complete acceptability for nearly all CDs. Most of the SACD/DVD-A discs are no match musically to many well recorded and upsampled CDs.
 
One of my famous audio designer friends (who will have to remained anonymous so that no one will flood his e-mail with questions) told me:

"Yeah, I've tried SRCs. I felt that I got the same amount of improvement by putting series resistors in all the data lines. A lot of work, and money, for little improvement."

His words, not mine. I suspect he might be close to the truth, though. I have never tried them, and see no reason yet to. I could be wrong..........

Jocko
 
The clock that feeds my 8420 has a high impact on the final result.
I started the design only prioritizing the DA chip clock but ended up giving the 8420 clock the same care. The improvement was way beyond my expectations.
 
Status
Not open for further replies.