Hello,
Have a few questions about mosfets.
1. Linear Derating Factor
Do i have to derate the power rating of vertical fets in an output stage. The output stage is common emitter. The datasheet mentions 2W/oC
derating factor. The snag is, if this is the case, is that i lose alot of the available power rating from the device.
Not sure on this one.
2.
The output stage is common emitter and the upper fet is a current source fed from an op amp. Class A.
The input capacitance is a problem here, the current to the gate obviously determines the slew rate of the amplifier.
I think, if i recall correctly, in common drain mode (source follower) that you don't need to drive the full input capacitance. ie. the driver only sees some of the capacitance ?
Just wondering if it would be better to put the amplifying fet on the top with the current source on the bottom to minimise the capacitance seen by the driver.
3,
Is it worth cascoding the current source with an additional fet. I have only seen cascoding in current sources done with jfets and bipolars.
I need to get a scanner at some point, would be easier with a schematic.
Any help/ideas welcomed
Kevin
Have a few questions about mosfets.
1. Linear Derating Factor
Do i have to derate the power rating of vertical fets in an output stage. The output stage is common emitter. The datasheet mentions 2W/oC
derating factor. The snag is, if this is the case, is that i lose alot of the available power rating from the device.
Not sure on this one.
2.
The output stage is common emitter and the upper fet is a current source fed from an op amp. Class A.
The input capacitance is a problem here, the current to the gate obviously determines the slew rate of the amplifier.
I think, if i recall correctly, in common drain mode (source follower) that you don't need to drive the full input capacitance. ie. the driver only sees some of the capacitance ?
Just wondering if it would be better to put the amplifying fet on the top with the current source on the bottom to minimise the capacitance seen by the driver.
3,
Is it worth cascoding the current source with an additional fet. I have only seen cascoding in current sources done with jfets and bipolars.
I need to get a scanner at some point, would be easier with a schematic.
Any help/ideas welcomed
Kevin
Yes, you have to de-rate the parts.
Assume 60% efficency for a normal bias class AB design, 100W out means 40W of heat to get rid of.
For normal amounts of heatsink, mounting losses, etc, figure the transistor will handle 1/6 of the power rating on the data sheet, a 150W transistor will handle 25W.
Thus a pair of 150W TO247 transistors are about right for a 100W class AB amp.
If push-pull class A, better make it three pairs. Half the efficency, 100% duty cycle.
If single-ended class A with an active current source (ZEN), better make it six pairs.
If using TO3 Motorola (ON Semiconductor) devices, A 400W class AB amplifier may be made with only two each of the MJ21193/21194 outputs. This is due to 250W rating plus the maximum junction temperture of 200*C for the metal case VS 150*C for the plastic.
Assume 60% efficency for a normal bias class AB design, 100W out means 40W of heat to get rid of.
For normal amounts of heatsink, mounting losses, etc, figure the transistor will handle 1/6 of the power rating on the data sheet, a 150W transistor will handle 25W.
Thus a pair of 150W TO247 transistors are about right for a 100W class AB amp.
If push-pull class A, better make it three pairs. Half the efficency, 100% duty cycle.
If single-ended class A with an active current source (ZEN), better make it six pairs.
If using TO3 Motorola (ON Semiconductor) devices, A 400W class AB amplifier may be made with only two each of the MJ21193/21194 outputs. This is due to 250W rating plus the maximum junction temperture of 200*C for the metal case VS 150*C for the plastic.
djk said:
60% efficiency means 40 % dissipation and 60% output out of totat 100% power consumption. So for 100W output it would be about 67W dissipation.
Al
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