Hello given the standard SET tube amplifier (12AX7+EL34) with global negative feedback from the OT to the cathode of the 12AX7, how can I simulate stability in LTspice?
Is it correct to put Vin=0 and insert AC=1 in the GNF (where before or after the fedback resistor or just below the cathode of the 12AX7)?
The OT should be loaded with a resistor or open?
If you have examples on LTspice stability with tube amplifiers should be great.... Thanks
Is it correct to put Vin=0 and insert AC=1 in the GNF (where before or after the fedback resistor or just below the cathode of the 12AX7)?
The OT should be loaded with a resistor or open?
If you have examples on LTspice stability with tube amplifiers should be great.... Thanks
I would think you need to find where the resonance is for the specific output transformer you are using.
Basically you need all the intrinsic properties correct in your model of the output transformer.
Basically you need all the intrinsic properties correct in your model of the output transformer.
I need to calculate the change in open-loop phase shift (including the OT).
Suppose i have a good OT model, where i should break the loop?
Suppose i have a good OT model, where i should break the loop?
Need to replicate this method:
Solutions - LTspice: Stability of Op Amp Circuits
So need to work on the loop closed.
Solutions - LTspice: Stability of Op Amp Circuits
So need to work on the loop closed.
Close loop = with feedback connected
Open loop = without feedback connected
Rum AC analysis for both cases and compare the results.
Open loop = without feedback connected
Rum AC analysis for both cases and compare the results.
You can't have the loop open and closed at the same time.
To open the loop you need to do two things:
1. open the loop by 'cutting' a wire (in principle, anywhere; for simplicity, choose a convenient place)
2. reinstate the impedance/voltage seen when the loop is closed.
For example, if you have a 22k feedback resistor from OPT secondary to input stage cathode and you break at the point this is about to join the cathode then you need to: a) add a 22k resistor from the cathode to ground (to simulate the effect on cathode bias of the feedback resistor)
b) add a small voltage source at this end of the feedback resistor (to simulate the effect of the cathode voltage on the OPT secondary).
In almost all cases you can omit step 2 as it has a negligible effect. Just be aware that you might hit a case where it matters, so be aware that you have omitted a step.
Then
3. inject a signal at one side of the break and see what signal appear at the other side of the break. This gives the loop gain.
To open the loop you need to do two things:
1. open the loop by 'cutting' a wire (in principle, anywhere; for simplicity, choose a convenient place)
2. reinstate the impedance/voltage seen when the loop is closed.
For example, if you have a 22k feedback resistor from OPT secondary to input stage cathode and you break at the point this is about to join the cathode then you need to: a) add a 22k resistor from the cathode to ground (to simulate the effect on cathode bias of the feedback resistor)
b) add a small voltage source at this end of the feedback resistor (to simulate the effect of the cathode voltage on the OPT secondary).
In almost all cases you can omit step 2 as it has a negligible effect. Just be aware that you might hit a case where it matters, so be aware that you have omitted a step.
Then
3. inject a signal at one side of the break and see what signal appear at the other side of the break. This gives the loop gain.
Thanks, that was exactly what I've requested, but still don't clear. Can you post a asc file example please?
Also the OT should be loaded with the output resistor or not?
Also the OT should be loaded with the output resistor or not?
Sorry, I described what you need to do - whether in simulation, calculation or real life. Up to you to do it.
Up to you what load you apply to the OPT. Depends on what question you are asking: loaded stability, or unloaded stability? Resistor, open circuit, capacitive load? In simulation you will be limited by the accuracy of your OPT model.
Up to you what load you apply to the OPT. Depends on what question you are asking: loaded stability, or unloaded stability? Resistor, open circuit, capacitive load? In simulation you will be limited by the accuracy of your OPT model.
This was what I was trying to tell him. It's all a waste of time if you are not using an accurate output transformer model of the exact OPT you intend to use in the design.
EDIT: To complicate matters further there will be stray capacitance caused from your layout so tinkering with stability is best left to be dealt with after the amp has been built. I tried using 30db of feedback in my PP monoblocks and it was a good exercise to learn about feedback systems.
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Simulation may help with LF stability, as the OPT is likely to be simpler down there. Not much help with HF stability.
Hello attached my circuit. I put AC=1 in the loop and measured V(FB)/V(INF). it gives to me margin of 68.45°, but I'm not sure regarding the result. If I put the AC source in a different place (i.e. just little before) I get a totally different result.
I did it correctly? Thanks
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