Hello, I thought I'd run my ideas passed you guys. Its pretty simple and straight forward but I find this concept interesting for a simple low power amplifier and the way its efficiency is boosted.
Standing current is set to 910mA, So the output transistors are dissipating a toasty 13W each.
Distortion is just shy of 0.01% at 12Vp-p, but mostly all 2nd and 3rd.
I have attached the asc LTspice file for anyone interested. Its simply a experiment at this point, but would like to know if its worth working on.
Thanks 🙂
Standing current is set to 910mA, So the output transistors are dissipating a toasty 13W each.
Distortion is just shy of 0.01% at 12Vp-p, but mostly all 2nd and 3rd.
I have attached the asc LTspice file for anyone interested. Its simply a experiment at this point, but would like to know if its worth working on.
Thanks 🙂
Attachments
I'm thinking of using different driver transistors for Q1 and Q4. BD139/140? maybe even a darlington for Q4 to maximize gain?
Adjustments have been made:
More suitable transistors have been chosen (Cordell Audio models).
Gain has been increased to about 10 times.
Predictably distortion has also increased to 0.028% but still shows a good profile in higher orders:
It seems like the circuit would benefit from higher gain transistors (apart from Q3). Any recommendations for common ones?
More suitable transistors have been chosen (Cordell Audio models).
Gain has been increased to about 10 times.
Predictably distortion has also increased to 0.028% but still shows a good profile in higher orders:
It seems like the circuit would benefit from higher gain transistors (apart from Q3). Any recommendations for common ones?
I like the option of using MOSFET's for the output transistors but can not find a way of boot-strapping the upper FET to overcome high gate to source voltage. It would be possible to use a P-Chan but I find this option less attractive and likely would be thermally/current unstable.
Q1 is needed to drive the high capacitance's of both FET's, allowing for higher loop gain thus lower distortion, especially at higher frequency's.
Looking even better now:
FFT 12Vp-p output (0.002%):
And 20Vp-p output (0.009%):
Current bias is set to 600mA. I do think in a real test this might change with temperature but I can only think of one better way to ensure more stable current draw, but it's not pretty and adds a fair bit more complexity 🙄
FFT 12Vp-p output (0.002%):
And 20Vp-p output (0.009%):
Current bias is set to 600mA. I do think in a real test this might change with temperature but I can only think of one better way to ensure more stable current draw, but it's not pretty and adds a fair bit more complexity 🙄
Something like:
View attachment 1336690
Analyzing this scheme, I find that the power line noise reflected at the amplifier output is only 16.5 dB lower than that present in the power line (in the range of 100 to 120 Hz). The PSRR is too low, so it is very likely that you require a power supply with extremely low ripple at the required current rating.
I haven't analyzed the other schemes, but it is highly likely that they behave quite similar in that parameter.
Likewise, I think they deserve to find a solution in that parameter, since I like these simple schemes.
Best regards
Yes, PSRR is poor unfortunately, but should be quite a bit better in the newest schematic than the one you analyzed.
White buffers are fine where the power supply can be well filtered like a line level signal, it becomes a PSRR problem for a power amp. The problem can be overcome by using a ~folded cascode so that the coupling is current and not voltage. LV's "tandem" circuit expands the idea with regenerative drive. (search DIYA) The attached simulation is my own version and claims "Total Harmonic Distortion: 0.000347%(0.000508%)". Note that is class-AB.
Attachments
I would try without Q1: let your ear decide about e.g. "high frequency" quality (or quantity;-) and audible distortions (noise, crash)Q1 is needed to drive the high capacitance's of both FET's, allowing for higher loop gain thus lower distortion, especially at higher frequency's.
Adjustment made while also trying to keep it as simple as possible:
Keeping the 600mA current, the distortion profile seems almost identical but the PSRR seems greatly improved.
Keeping the 600mA current, the distortion profile seems almost identical but the PSRR seems greatly improved.
Interesting scheme. Try connecting an electrolytic capacitor in parallel with R14.
Another option is to use instead of M1 a pair of shiklai from PNP BJT and n-channel mosfet. This will allow you to use the same output transistors
Another option is to use instead of M1 a pair of shiklai from PNP BJT and n-channel mosfet. This will allow you to use the same output transistors
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