Hello all,
Sorry for my english...
My project is create a DAC with differents I2S sources: a receiver (SPDIF + toslink + Amadero) + bluetooth + raspberry + 1 free source available.
Each source has it own I2S output.
It's a bit complicated but I prefer a scalable solution with separate elements that I could upgrade separately: a source part (spdif + usb + bluetooth + raspberry + ...) => i2s => reclock / isolator => DAC , rather than a full DAC on a single card, knowing that the problem always arises to integrate a raspberry on a DAC integrated in I2S ...
I would therefore like to implement an i2s selector (MCLK + BCLK + LRCLK + DATA) allowing to choose 1X4 outputs among 4x4 inputs to attack the DAC from 4 different sources.
I am wondering how to set up this system, because I am not very knowledgeable in electronics.
I have the possibility to set up for example 4 x HC573 (https://assets.nexperia.com/documents/data-sheet/74HC_HCT573.pdf) or to use 16 x Takamisawa NY-24W-K-IE (https://www.fujitsu.com/downloads/MICRO/fcai/relays/ny.pdf).
If possible, I would like to avoid cascade, for example avoiding putting 3 x 74HC157.
Do you have any ideas on what implementation i could do to get the best signal possible? Are there more efficient chipsets to pass I2S signals with the high frequencies found on this bus and that without noise?
I saw that : Input Selector 4x I2S Input to 1x I2S Output - Audiophonics
But i would want to make my own mother card with spdif-toslink-usb or blutooth as daughters cards (and the logic to select input) to avoid cables and noises. So if i have to implement the selector on my mother card, i can make the best selector 🙂.
Thank you in advance and best regards
Christophe
Sorry for my english...
My project is create a DAC with differents I2S sources: a receiver (SPDIF + toslink + Amadero) + bluetooth + raspberry + 1 free source available.
Each source has it own I2S output.
It's a bit complicated but I prefer a scalable solution with separate elements that I could upgrade separately: a source part (spdif + usb + bluetooth + raspberry + ...) => i2s => reclock / isolator => DAC , rather than a full DAC on a single card, knowing that the problem always arises to integrate a raspberry on a DAC integrated in I2S ...
I would therefore like to implement an i2s selector (MCLK + BCLK + LRCLK + DATA) allowing to choose 1X4 outputs among 4x4 inputs to attack the DAC from 4 different sources.
I am wondering how to set up this system, because I am not very knowledgeable in electronics.
I have the possibility to set up for example 4 x HC573 (https://assets.nexperia.com/documents/data-sheet/74HC_HCT573.pdf) or to use 16 x Takamisawa NY-24W-K-IE (https://www.fujitsu.com/downloads/MICRO/fcai/relays/ny.pdf).
If possible, I would like to avoid cascade, for example avoiding putting 3 x 74HC157.
Do you have any ideas on what implementation i could do to get the best signal possible? Are there more efficient chipsets to pass I2S signals with the high frequencies found on this bus and that without noise?
I saw that : Input Selector 4x I2S Input to 1x I2S Output - Audiophonics
But i would want to make my own mother card with spdif-toslink-usb or blutooth as daughters cards (and the logic to select input) to avoid cables and noises. So if i have to implement the selector on my mother card, i can make the best selector 🙂.
Thank you in advance and best regards
Christophe
You might take a look at something like https://www.ti.com/lit/ds/symlink/s...22062&ref_url=https%3A%2F%2Fwww.mouser.com%2F ...or some other 4 in 1 out multiplexers.
Dear Vavilen,
Since your 4 x I2S could originate from different sources, it may be necessary to multiplex SCLK, LRCLK, BCLK and LRDATA, requiring four 4:1 multiplexer chips for the entire arrangement with the selector lines being common to all. You could try low-cost analogue MUXes like 74HC4052.
All the best.
Since your 4 x I2S could originate from different sources, it may be necessary to multiplex SCLK, LRCLK, BCLK and LRDATA, requiring four 4:1 multiplexer chips for the entire arrangement with the selector lines being common to all. You could try low-cost analogue MUXes like 74HC4052.
All the best.
Use single gate or isolator or relay for each single line of I2S bus
for 4 lines with master clock line that will be 16 single devices.
That will prevent interaction of different frequencies in the small die of chips, and every line will have own power decoupling. active I2S bus (4 lines) enable, other lines disable.
Maybe it is more ICs but that is the best way. It is same repetition of four pcb-s. and it will be best to put in vertical stack. In that way cables will be the short and outputs can be tied together. Stack is in the back plate near the I2S inputs. And controll switch could be in the front...
for 4 lines with master clock line that will be 16 single devices.
That will prevent interaction of different frequencies in the small die of chips, and every line will have own power decoupling. active I2S bus (4 lines) enable, other lines disable.
Maybe it is more ICs but that is the best way. It is same repetition of four pcb-s. and it will be best to put in vertical stack. In that way cables will be the short and outputs can be tied together. Stack is in the back plate near the I2S inputs. And controll switch could be in the front...