As the beloved SSLV1.1 BiB shunt reg was getting long in the tooth, especially for NOS JFETS, I had in mind for some time now to design its successor. The goals were: 1. In production parts 2. Much simpler to set up. 3. Better technical and subjective performance.
After many breadboard experiments and two prototype PCB iterations I feel that my goals were finally met. So here comes the UltraBiB V1.3 😀
-Uses no NOS parts.
-Can do 5V to 40V output without changing a thing in its parts configuration.
-Nothing to choose and match. No tolerances in predicting its CCS limit setting.
-Has 45dB more open loop gain and many times less output impedance than 1.1
-Sounds easily better.
-Its an electrically and mechanically drop in replacement for an upgrade from 1.1
I have already given spare earlier proto boards with now deleted experimental features to few local beta testers. They are all happy by now as far as I know. The pictured board in green is the final layout in just cheapo proto that's a pain to rework and its pads vaporize in the end. It will come in proper grade black solder mask and immersion gold three sections board just like the original.
Attached: Zout plot for 150ma spare current and noise plots for 100,150,220,330,470,1000uF C2 (red 220uF). Also the rails probed on the scope for positive and negative sections. Here are typical values schematics also. I will write a PDF with instructions. Not that there is something truly special to consider when building it with the suggested parts but to describe it better as an item and to clarify details and precautions.
Updates:
31/5/18 R9's value update
1/6/18 OL sim at 100mA spare
2/6/18 Build Guide PDF added (0V0b)
24/5/19 Triplet board dimensions picture
21/6/19 The PF5102 JFET became EOL. But GB long term supply is secure. For substituting with J113 see info in post #1559
15/5/20 BC560C became EOL. But Group Buy long term supply is secure. BC559 can be used up to 30V output. BC556 for 31V-45V output.
2/7/23 LNA instrumentation measured a very low 2nVrtHz spectral noise density from the UltraBiB under real working conditions. post#3,688
After many breadboard experiments and two prototype PCB iterations I feel that my goals were finally met. So here comes the UltraBiB V1.3 😀
-Uses no NOS parts.
-Can do 5V to 40V output without changing a thing in its parts configuration.
-Nothing to choose and match. No tolerances in predicting its CCS limit setting.
-Has 45dB more open loop gain and many times less output impedance than 1.1
-Sounds easily better.
-Its an electrically and mechanically drop in replacement for an upgrade from 1.1
I have already given spare earlier proto boards with now deleted experimental features to few local beta testers. They are all happy by now as far as I know. The pictured board in green is the final layout in just cheapo proto that's a pain to rework and its pads vaporize in the end. It will come in proper grade black solder mask and immersion gold three sections board just like the original.
Attached: Zout plot for 150ma spare current and noise plots for 100,150,220,330,470,1000uF C2 (red 220uF). Also the rails probed on the scope for positive and negative sections. Here are typical values schematics also. I will write a PDF with instructions. Not that there is something truly special to consider when building it with the suggested parts but to describe it better as an item and to clarify details and precautions.
Updates:
31/5/18 R9's value update
1/6/18 OL sim at 100mA spare
2/6/18 Build Guide PDF added (0V0b)
24/5/19 Triplet board dimensions picture
21/6/19 The PF5102 JFET became EOL. But GB long term supply is secure. For substituting with J113 see info in post #1559
15/5/20 BC560C became EOL. But Group Buy long term supply is secure. BC559 can be used up to 30V output. BC556 for 31V-45V output.
2/7/23 LNA instrumentation measured a very low 2nVrtHz spectral noise density from the UltraBiB under real working conditions. post#3,688
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nice results!
How was the ground plane? Only on pcb bottom?
Have you made a star ground in relation to rectifier diodes, or covered all areas?
Can you show any pictures?
Best Regards
How was the ground plane? Only on pcb bottom?
Have you made a star ground in relation to rectifier diodes, or covered all areas?
Can you show any pictures?
Best Regards
Salas, thank you for sharing! Can we use BC560C throughout the regulator or you had “hidden agenda” for the 327’s?
The 100C core temperature continuous ID limit for the FQP3P20 is 1.77A and 2A for FQPN30 as M1s and you can push them when having enough sinking for them as the ID max goes up when cooler inside. The spare current (current limit CCS seting - load pk current draw) can remain low circa 100mA to 150mA since the Zo spec is very good with little spare and you save on output Mosfet's heat at least.
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Regards
Edit: There is an error in the prototype board. Corrected in the normal GB issue black triplet boards.
Edit2: Here are the normal issue boards (some weird stripes on the first's right side are light effects)
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Yes you can use BC560C/550C only. The 327s and 337s are lending bit more phase margin in the CFP driver role and bit less noise in the current limiter's ref. This way its little better.
Oh come on! I just finished this...At least I haven't done the drilling. Please tell me boards are coming soon!
Nice work as always Salas!
I was hoping that the forthcoming GB can include this. I finished it on time 🙂
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I haven’t seen a Quasimodo snubber before, I am as looking at the caps before the rectifier and thinking what the? Can this be done with other psu designs and what are the benefits, less ripple?
Bix, yes its a universally applicable thing, read: Simple, no-math transformer snubber using Quasimodo test-jig