I'm considering to add a digital input to my CD player project. I haven't done any work in this field since the CS8412, which kind of inspired me to do away with the whole S/PDIF input.
What are the current trends in this field? What are your experiences?
My project uses an 192x MCLK generated on the DAC board to read standard 44.1/16 from a CD drive. I use an FPGA to implement a custom 8x interpolator on top of that.
So I'd like to keep up with this clocking scheme. Is asynchronous reclocking the way to go? What is a reasonable output frequency? 44.1 or 88.2 over i2s would fit well with the rest of the design.
Thanks,
Borge
What are the current trends in this field? What are your experiences?
My project uses an 192x MCLK generated on the DAC board to read standard 44.1/16 from a CD drive. I use an FPGA to implement a custom 8x interpolator on top of that.
So I'd like to keep up with this clocking scheme. Is asynchronous reclocking the way to go? What is a reasonable output frequency? 44.1 or 88.2 over i2s would fit well with the rest of the design.
Thanks,
Borge
borges said:I'm considering to add a digital input to my CD player project. I haven't done any work in this field since the CS8412, which kind of inspired me to do away with the whole S/PDIF input.
What are the current trends in this field? What are your experiences?
My project uses an 192x MCLK generated on the DAC board to read standard 44.1/16 from a CD drive. I use an FPGA to implement a custom 8x interpolator on top of that.
So I'd like to keep up with this clocking scheme. Is asynchronous reclocking the way to go? What is a reasonable output frequency? 44.1 or 88.2 over i2s would fit well with the rest of the design.
Thanks,
Borge
Can't answer the other questions, but the Wolfson WM8804 is a very solid performer which I use in my own dac. Probably pretty close to SOTA at the moment in commodity spdif receiver chips.
a number of people (myself included) like the SRC4392 from TI. This provides ASRC as well.
I'll let you know how it works when I've built it up.
BTW I believe ASRC is the way to go to to deal with S/PDIF regurgitated clock issues.
I'll let you know how it works when I've built it up.
BTW I believe ASRC is the way to go to to deal with S/PDIF regurgitated clock issues.
Thanks guys.
Do you know how wise it is to convert incoming digital audio to 44.1/16? Anybody out there having tested these devices at this rate?
The reason is that the rest of my system is designed to handle I2S from a CD drive. I'm using a custom 8x interpolator in an FPGA.
Now I keep getting the feedback that digital in would be a good idea for my CD player. Managing input data at different sampling rates (and resolutions) would be quite a hassle.
Cheers,
Borge
Do you know how wise it is to convert incoming digital audio to 44.1/16? Anybody out there having tested these devices at this rate?
The reason is that the rest of my system is designed to handle I2S from a CD drive. I'm using a custom 8x interpolator in an FPGA.
Now I keep getting the feedback that digital in would be a good idea for my CD player. Managing input data at different sampling rates (and resolutions) would be quite a hassle.
Cheers,
Borge
...not to mention problems with sync'ing multiple clocks.
My system is a DSP based crossover design running at 48KS/s. I had the same problems of accepting S/PDIF at multiple rates and this is exactly why I chose the SRC4392 over a plain CS8416 receiver.
Sample rate conversion is fine as long as it's done well (filter design is critical) I read somewhere that jitter can be a problem on asynchronous SRC's as these systems are sensitive to the phase of the input and output clocks. This will be something to test.
As I say, I haven't tried it yet. The PCB should arrive is a week or so and I have all the parts. Stay tuned...
My system is a DSP based crossover design running at 48KS/s. I had the same problems of accepting S/PDIF at multiple rates and this is exactly why I chose the SRC4392 over a plain CS8416 receiver.
Sample rate conversion is fine as long as it's done well (filter design is critical) I read somewhere that jitter can be a problem on asynchronous SRC's as these systems are sensitive to the phase of the input and output clocks. This will be something to test.
As I say, I haven't tried it yet. The PCB should arrive is a week or so and I have all the parts. Stay tuned...
HI
The PCB should arrive is a week or so and I have all the parts
Tell us more
This PCB can replace a CS8414 or a CS 8416 to connect it to a TDA 1543 or TDA 1545 .
Serge
The PCB should arrive is a week or so and I have all the parts
Tell us more
This PCB can replace a CS8414 or a CS 8416 to connect it to a TDA 1543 or TDA 1545 .
Serge
it has it's own thread here
http://www.diyaudio.com/forums/showthread.php?s=&threadid=129576
apologies to this thread for being a p-w
http://www.diyaudio.com/forums/showthread.php?s=&threadid=129576
apologies to this thread for being a p-w

Sorry for hijacking your thread, Borges. My intention was to share my current research in this area.
Sergelisses - send me an email😉
Sergelisses - send me an email😉
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