Hi there guys,
I have a major (for me) dilema.
I want to remove the SM5840 Digital Filter from my CD-42, like Sander Sassen did here
From the picture where the SM5840 is remove it is clearly that pins 10 with 17 and 2 with 4 are connected. No problem here.
I just want to route the signals from SAA7310 to SAA7350.
For this I have a possible solution.
DAAB to WSI
CLAB to SCKI
WSAB to ? ( dont know )
I have 2 more pins that I dont know what to do with them. SDI1 and SDI2. These are connected to DOL/DOR ( Data Output L/R ).
Here are some parts from the CD42 service manual:
http://imageupload.com/out.php/i86007_untitled2.JPG
http://imageupload.com/out.php/i86008_untitled3.JPG
http://imageupload.com/out.php/i86009_untitled4.JPG
http://imageupload.com/out.php/i86010_untitled5.JPG
I have a major (for me) dilema.
I want to remove the SM5840 Digital Filter from my CD-42, like Sander Sassen did here
From the picture where the SM5840 is remove it is clearly that pins 10 with 17 and 2 with 4 are connected. No problem here.
I just want to route the signals from SAA7310 to SAA7350.
For this I have a possible solution.
DAAB to WSI
CLAB to SCKI
WSAB to ? ( dont know )
I have 2 more pins that I dont know what to do with them. SDI1 and SDI2. These are connected to DOL/DOR ( Data Output L/R ).
Here are some parts from the CD42 service manual:
http://imageupload.com/out.php/i86007_untitled2.JPG
http://imageupload.com/out.php/i86008_untitled3.JPG
http://imageupload.com/out.php/i86009_untitled4.JPG
http://imageupload.com/out.php/i86010_untitled5.JPG
Hi,
When you remove this chip, you'll want to bridge these pins where the SM5840 was;
Serial Data: DIN(18) to DOL(12)
Bit Clock*: BCKI(17) to BCKO(10)
Word Clock: LRCI(16) to WCKO(13)
Master Clock: CKI(2) to CKO(4)
* Word clock (WCK) and left-right clock (LRCK) are the same thing. Funny that they would use the two different names in one chip.
Also, the SM5840 was converting from I2S to simultaneous mode, so the data going to the SAA7350 will change format. You will have to change some pins on the SAA7350 to allow it to accept this change;
Pins IDF1(5), IDF2(4), and IFD3(3) should be low (grounded). At least one of them will high (connected to Vdd) at the moment.
That should be all you need to do. Get back to us when you try it. I'm interested to see how much of an improvement this will make.
Anton
When you remove this chip, you'll want to bridge these pins where the SM5840 was;
Serial Data: DIN(18) to DOL(12)
Bit Clock*: BCKI(17) to BCKO(10)
Word Clock: LRCI(16) to WCKO(13)
Master Clock: CKI(2) to CKO(4)
* Word clock (WCK) and left-right clock (LRCK) are the same thing. Funny that they would use the two different names in one chip.
Also, the SM5840 was converting from I2S to simultaneous mode, so the data going to the SAA7350 will change format. You will have to change some pins on the SAA7350 to allow it to accept this change;
Pins IDF1(5), IDF2(4), and IFD3(3) should be low (grounded). At least one of them will high (connected to Vdd) at the moment.
That should be all you need to do. Get back to us when you try it. I'm interested to see how much of an improvement this will make.
Anton
amc184 said:
* Word clock (WCK) and left-right clock (LRCK) are the same thing. Funny that they would use the two different names in one chip.
Because LRCI and WCKO are clearly not the same. The difference in mark:space ratio is not arbitary.
Well, I guess WS and LR are not the same, but they are at least equivalent between their respective formats. Anyway, in I2S mode the SAA7350 will expect the format of clock the SAA7310 is outputting, so bridging these pins should work just fine.
Oh, and rfbrw, if you were to put a new master clock in this system, would you allow the SAA7350 to buffer it, or would you distribute it directly to the SAA7310?
Hi there,
Thank you guys for your answers.
I will try it, after I finish the school.
All I must do is:
Remove SM5840 chip, then bridge :
DIN(18) to DOL(12)
BCKI(17) to BCKO(10)
LRCI(16) to WCKO(13)
CKI(2) to CKO(4)
Finally connect the IDF3 to IDF2 and IDF1, which are grounded.
And now, I can rest regarding this. The next part is to search for a clock upgrade.
Best regards,
Bogdan
Thank you guys for your answers.
I will try it, after I finish the school.
All I must do is:
Remove SM5840 chip, then bridge :
DIN(18) to DOL(12)
BCKI(17) to BCKO(10)
LRCI(16) to WCKO(13)
CKI(2) to CKO(4)
Finally connect the IDF3 to IDF2 and IDF1, which are grounded.
And now, I can rest regarding this. The next part is to search for a clock upgrade.
Best regards,
Bogdan
amc184 said:Oh, and rfbrw, if you were to put a new master clock in this system, would you allow the SAA7350 to buffer it, or would you distribute it directly to the SAA7310?
I'd go direct.
I have a problem.
The datasheet info does not match with my IC.
And I think in the service manual, something is wrong (refering to SAA7350).
The datasheet info does not match with my IC.
And I think in the service manual, something is wrong (refering to SAA7350).
Here is a picture:
http://imageupload.com/out.php/i86817_P3177068001.JPG
Something doesnt add up.
Or I`m to nervous at the moment.
Later Edit:
Got it guys.
It was ok. Some names have been replaced in the datasheet or/in my schematic that doesnt matched.
http://imageupload.com/out.php/i86817_P3177068001.JPG
Something doesnt add up.
Or I`m to nervous at the moment.
Later Edit:
Got it guys.
It was ok. Some names have been replaced in the datasheet or/in my schematic that doesnt matched.
First I want to thank you, amc184.
Well the sound is changed a little. Especially in the bass area.
Have a good night,
Bogdan
Well the sound is changed a little. Especially in the bass area.
Have a good night,
Bogdan
No problem, I'm glad it worked. I think replacing the crystal attached to the SAA7350 with a low jitter master clock would give a much greater improvement.
Anton
Anton
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