So, I just made a blind test with some people (not trained ears), switching between the variants without telling them anything beforehand.
Did they hear a difference? "Obviously", "yes", "sure" etc. So which one did they prefer? Easily the one with the clock stopped. Why that one? "It sounds more alive", "the other sounds flat", "it sounds closer", "there is something wrong with the high end on that one" etc.
It's a small difference, but then it is not.
Soeren, how much time would it cost you to add a couple of parameters to the setup so the clock can be set to update only rarely? How much does it cost? I will pay for this if I must.
Did they hear a difference? "Obviously", "yes", "sure" etc. So which one did they prefer? Easily the one with the clock stopped. Why that one? "It sounds more alive", "the other sounds flat", "it sounds closer", "there is something wrong with the high end on that one" etc.
It's a small difference, but then it is not.
Soeren, how much time would it cost you to add a couple of parameters to the setup so the clock can be set to update only rarely? How much does it cost? I will pay for this if I must.
I didn't compare to 1.19. It uses different filters etc.
1.21 and 1.23 both have advantages and disadvantages, but you don't want to live with the latter once you heard the DAM1021 with the clock stopped.
Just compare whatever version you have installed to how the DAM1021 sounds with the clock stopped (entered Tera Term). Make sure you use a good filter (both antialiasing filters) and have the two polymer decoupling caps before and after the regulator that feeds the clock installed. Otherwise it probably isn't audible as much.
I wish someone with rocket/satellite technology level measuring equipment were able to have a look what is going on with the clock. I bet it is not transparent in the DAM1021 when adjusting sample rate.
@ Soeren: How hard would it be for you to add those two parameters? Is it possible for someone else to do the adjustments or are you the only one with access to this firmware?
Have you done usb/i2s vs AES/spdif interface comparison? If so, do they get exactly the same differences in audio quality with and without updating the clock stopped?
Thank you living sounds good your kind reply. I have some questions. I'm sorry, but I'm not so involved in digital topics. I just wish to get the best performances out of my dac. How can I stop the clock using Tera Term? I have the rev.6, which I remember it doesn't need the modding of the previous versions. Is it correct? Surely I'll not try to modify the board in any way, I'm too scared to make a mess. Nevertheless, do you think it could be worth a try? Even if I don't add any polymer decoupling cap? Where can I find the antialiasing filters which you were talking about?
Thank you,
Gaetano.
Thank you,
Gaetano.
You connect to the DAC and hit +++
Now the clock adjustment is stopped.
When you do "exit" it will start again.
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Now the clock adjustment is stopped.
When you do "exit" it will start again.
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I added a better quality AES/EBU receiver to my DACs, which then did result in better quality. But it shouldn't if the reclocking were handled better (provided the incoming digital signal comes from a capable source). In my case the FIFO buffer needs to correct for a drift of less than 0.4 ms per hour. Since the buffer is sized at 1ms this means the buffer would hold for the full hour without ever needing updating of the clock.
The frequent updates of the DAMs internal clock likely introduce unnessary jitter.
I asked because there is major difference in clock source it this two interfaces. AES/spdif recovers clock from signal. Taking into account how reclocking is handled by dam1021 could generate bigger jumps in clock adjustment. As you know si514 allow clock adjustment with two methods small frequency change and large . Small need 100us to settle which seems to be fixed and large max 10ms. I discover that improving usb/i2c interface allow me to solve large updates problem. So when I tested firmware 1.23 I get very similar results like with clock stopped. It looks like small updates was blocked in that firmware. I have new rev.7 dam1021 and in aspect of clock performance it is another league, huge improvement in solidity and stability, everything is so tight. Clock signal routing seems to be significant upgrade. Still from my perspective rev.5 sounds better. Without control of clock adjustment behaviour improving source is only way. Or you have to hack communication between uManager and clock by inserting in the middle own controller, as you already know buffer is big enough.
Have you actually sniffed the i2c communication and detected Large adjustments ordered?
You write "I discover that improving usb/i2c interface".... (did you mean usb/i2s?) - how did you improve it?
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You write "I discover that improving usb/i2c interface".... (did you mean usb/i2s?) - how did you improve it?
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For sniffing you need better tools.
Yes, usb/i2s.
nothing unusual. Separate usb power, separate ISO power, better cables. And I never turn off the DAC 🙂
Yes, usb/i2s.
nothing unusual. Separate usb power, separate ISO power, better cables. And I never turn off the DAC 🙂
If you don't sniff the i2c towards the Si, how do you know about the small / large adjustments?
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Interesting.
I have looked at the clock drift in delta wave, and both 1.21 and 1.23 seem to drift the same over longer time spans with an incoming AES/EBU signal that is likely not sufficiently jitter free for high end audio (which is why we have a FIFO buffer) but fairly stable over the time spans relevant (several seconds to minutes), as evidenced by the little and quite linear drift I measured with the clock stopped.
So it would be interesting to know what the re-clocker does, but unfortunately Soeren is not forthcoming.
But why do you write that rev. 7 performs better and still you think rev. 5 sounds better? In what way? With the clock stopped, with which software version etc.?
I remember that I tested the performance of my AES/EBU input and found that it sounded better with the transformer bridged (there is already a transformer on the AES/EBU outputs, so the second one is not technically needed). This points again to the re-clocker being sensitive to short-term jitter (which the transformer might enhance), which in turn leads to the conclusion that the re-clocker is acting on too short a time span.
I bought an S/PDIF receiver I2S transmitter that is supposed to clean up the clock to try out, but it really wouldn't be necessary if the DAM1021's reclocker were reconfigured.
A re-clocker works within one and the same clock-domain (it restores the timing aspects of a signal by re-using the same clock that it was clocked by in an earlier instance), a fifo lets two clock domains meet and the downstream domain will track the "incoming" domain by altering the clock in the downstream domain. In the DAM there is not a re-clocker, its a fifo.
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I have no clue which mechanism of adjustment is actually used. Based on observations I can only estimate. Consider that there is fixed time of 100us to update clock in small frequency adjustment in +/-1000ppm window. So steepness of adjusting 1ppm vs 900ppm or even -900ppm and after while +900ppm it’s not equal. That can be easily observed on oscilloscope or even heard.
I prefer 1.21 firmware (tested 1.19 and 1.23) without clock adjustment stopped. Small updates of clock in rev.5 adds 3dimensionality to the instruments, they get volume. There is no pinpoint source of sound it's more direction(place in space) that’s give more analog perception. Soundstage is deeper more proportional. Overprecision sounds artificial. I'm on headphones so already sterile environment.
I think it is - re-klocker points to an other mechanism that don't use a PLL and the PLL is the whole thing with it. A digital PLL can utilise a memory (FIFO) to swallow some differences between the clock domains without having to adjust the downstream clock - exactly what we want and cant be accomplished by re-clocking as re-clocking is a synchronous concept to wash out jitter (jitter being defined as < 0,1 pulse time). Re clocking... "re-use_of_same_clock". We have in the DAM a "new-clocker".
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