RE-clock for the TDA1541a non-oversampling DAC.

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Now i get it.
Ok so you are generating two new clocks including a new bitclock, which admittedly seems to ok provided the 74hc4040 performs good enough.
I see some problems if i am comparing to the other reclock circuit.

On the other reclock circuit the pins from the CS are inverted and sent to the 1541 whilst you are sending the same signal. I haven't checked what they do, is this intentional?


Definitely add a resistor in series with all clock signals, guido tent has an excellent paper on why, Tent document . Possibly a ferrite or inductor in the feed to the circuits as well, before the cap.

Where is the 0.1u cap?
 
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