Hi again. I've been interested in designing a version of my first amplifier using LSK170/LSJ74 in the voltage gain stage and Exicon lateral MOSFETS in the output section. I spent some time in a simulator and came up the attached topology as a rough target. As it turns out, it was nearly identical to the ACA Mini, oh well. I'll try to spend some time today on a breadboard and figure out some component values.
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Hi
this is refered to the original Profet amplifier. Because of the very low open loop gain it has a relatively high output impedance.
Nelson Pass has used vertical mosfet to resolve these characteristics in his F5 amp. In his F7 amp he has used Lateral mosfet but with positive feedback to lower output impedance. Like you I was curious about using Lateral mosfet in that topology. In my case to use Lateral mosfet as ouput I have used a different approach to get more open loop gain and lower output impedance. Just look for USSA-3 (jfet input) or USSA-5 (bjt CFP input) threads. I have done and built many variations….
But if You are ok with the characteristics of this Profet amp topology then you can go ahead.👍
One Comment, with your actual high close gain and the low open loop gain you have little overall feedback left….
Also open loop gain is depending a lot on the IDSS of the jfet.
good luck
Fab
this is refered to the original Profet amplifier. Because of the very low open loop gain it has a relatively high output impedance.
Nelson Pass has used vertical mosfet to resolve these characteristics in his F5 amp. In his F7 amp he has used Lateral mosfet but with positive feedback to lower output impedance. Like you I was curious about using Lateral mosfet in that topology. In my case to use Lateral mosfet as ouput I have used a different approach to get more open loop gain and lower output impedance. Just look for USSA-3 (jfet input) or USSA-5 (bjt CFP input) threads. I have done and built many variations….
But if You are ok with the characteristics of this Profet amp topology then you can go ahead.👍
One Comment, with your actual high close gain and the low open loop gain you have little overall feedback left….
Also open loop gain is depending a lot on the IDSS of the jfet.
good luck
Fab
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John
You might try your circuit without the source resistors on the MOSFETs. This will give you more open loop gain as there is no local feedback to reduce the mosfet's transconductance . The Profit circuit did not use source resistors either. Laterals have negative tempco above 100mA and I have had no issues with thermal runaway and in my case sounds better.
You might try your circuit without the source resistors on the MOSFETs. This will give you more open loop gain as there is no local feedback to reduce the mosfet's transconductance . The Profit circuit did not use source resistors either. Laterals have negative tempco above 100mA and I have had no issues with thermal runaway and in my case sounds better.
Thanks very much Fab and Ejam for your replies.
That really helped increase the open loop gain, much appreciated.
Indeed, it has a damping factor of about 1.5 into 8 ohms... yikes. Your reply has a lot good areas to research, which I will commence to do. Have you written anywhere about how solved the issue in the USSA-3?
Ejam said:
That really helped increase the open loop gain, much appreciated.
fab said:
Indeed, it has a damping factor of about 1.5 into 8 ohms... yikes. Your reply has a lot good areas to research, which I will commence to do. Have you written anywhere about how solved the issue in the USSA-3?
I did it like this:
https://www.diyaudio.com/community/...riant-with-gr-grade-jfets-and-latfets.258666/
And the much better one is here:
https://www.diyaudio.com/community/threads/cubie2.271543/
https://www.diyaudio.com/community/...riant-with-gr-grade-jfets-and-latfets.258666/
And the much better one is here:
https://www.diyaudio.com/community/threads/cubie2.271543/
John
in my USSA-3
1) very low source resistors value (if you want to measure bias easily) or no resistor - as mentioned by Ejam
2) use very low idss grade jfet (this will allow a higher jfet drain resistance value for higher gain)- as mentioned by Juma
3) use an intermediate transistor stage to allow an even higher jfet drain resistance value for higher gain
4) use low close loop gain to get more feedback factor (which also reduces output impedance)
you may not need all of the above since it can still give interesting results with items # 1, 2 and 3.
Fab
Originally I thought it was there to increase gain but it behaves the same without. Not sure where my confusion comes from here. Just one of the many mistakes I plan on making during thile design process.
John
I forgot to mention if you want more gain then use a double die lateral mosfet (Exicon 20N20 and 20P20). These have double the transconductance of the 10N20 and 10P20 and thus more gain.
If you have time and the inclination, then you may wish to test bench the following circlotron design (credit to Mike Rothacher's vertical mosfet design). Same devices, may have to fiddle with the bias and feedback. You will need two power supplies and make sure you float them, no grounding one end.
I forgot to mention if you want more gain then use a double die lateral mosfet (Exicon 20N20 and 20P20). These have double the transconductance of the 10N20 and 10P20 and thus more gain.
If you have time and the inclination, then you may wish to test bench the following circlotron design (credit to Mike Rothacher's vertical mosfet design). Same devices, may have to fiddle with the bias and feedback. You will need two power supplies and make sure you float them, no grounding one end.
