Power Supply Designing using LM317, RC-snubber

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I have read about Power Supply Design much at Internet.
Finally, i come to want to know what i know is correct or incorrect.

This general circuit is my little understanding about PSD.
fE means uF (font bug)
This circuit contains optional parts such as spike killer for diode bridge.

Snubber information from these PDFs.
Calculating Optimum Snubbers
RC Snubber Design using Root-Loci Approach for Synchronous Buck SMPS
First, transformers have "leakage inductance" and "parasitic capacitance" so that
transformers make Spike-noise with Diode switching.
The way to remove spike-noise is RC snubber.
We have to know how much leakage inductance is , to build snubber.
Parasitic capacitance is generally very low(pF order),
so adding small capacitance(0.01uF to 0.1uF) is reasonable way to ignore parasitic capacitance.
look C1 in powersupply.jpeg
we can add inductance with the same as adding small capacitance to ignore parasitic capacitance , however
we can know how much leakage inductance is from oscillation.
f = 1 / (2Pi * sqr(L * C) )
L = 1 / ( (2Pi * f)^2 * C)
C is added small capacitance.

and then, we know how much impedance of L C is.
Z = sqr(L / C)
when Ā = 0.5 (damping coefficient), R of Snubber[Rs] is equal to Z
Rs = Z = sqr(L / C)
Rs is not dependent on our circuit but on transformer.
C of Snubber[Cs] reduce unnecessary current of Rs , or reduce Rs's thermo.
The reasonable amount of Cs is the following.
3*C <= Cs <= 4*C
Too large Cs is to make Rs burning and to lose efficiency.
In powersupply.jpeg, "C = 0.1uF, Cs = 0.3uF, Rs = 2ohm" is simply a example.

After rectification, we usually put large capacitance like 10000uF.
To reduce ESR and ESL of large capacitance, we also put ceramic or film capacitance(1uF or so) in parallel.
Double large capacitances are good for reducing ESR.
ESR is very important on low frequency(100Hz or so) ripple rejection.
Generally, big capacitances have big ESL and small ESR, and vice versa.

From above URLs discussion, the amount of Cadj and Cout is 220uF.(Is it OK ?)
ESR of Cout should be high enough to damp regulator's oscillation.(100m ohm is good)
ESL of Cadj should be small enough to reject high frequency ripple.

These are my understanding, but maybe some points are incorrect.
To tell the truth, I did'nt understand all of above discussion.
(Science English is too unfamiliar)
I'm happy if you correct my understanding.
Thank you for reading!
Re: Re: Power Supply Designing using LM317, RC-snubber

BWRX said:

Hi okina. I think you just misread the value for Cadj as you usually want it to be about 22uF (not 220uF) for 120Hz ripple.

Thanks alot, and I'm very sorry to late for replay.
I was imprisoned in university examination.
Well, would you tell me which sentence mentioned that
22uF cap is good for 120Hz ripple ?
from this graph
"Output impedance versus adjust capacitor: C1 = 0 (red), 2.2uF (green), 22uF (blue), 220uF (gold)"
any cap except 0uF(red) is good for 1kHz or higher freq.
22uF and 220uF is good for 100Hz or 120Hz ripple.
I think this band ripple is main ripple of rectification.
ripple of less than 100Hz band is not important for us ?

But now, I think to construct dicrete regulator.
Because many people said that discrete one is better.
Are there any project about discrete regulator in diyAudio.com ?
Joined 2005
Yes, 100-120Hz is the range where you want the most ripple rejection if you're using a transformer and a rectifier.

From the picture you posted, it shows that you plan on using the LT1083 regulator. The LT1083/84/85 datasheet states that a 120Hz adjust pin capacitor should be 25uF if R1 is 100ohms.
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