Philips CD150 - Own clock for SAA7030 and TDA1540

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Marantzien

Marantzien

Member
Joined 2023
#1
Hello everyone,

I bought a Philips CD 150 to make some modifications and see how far it's possible to improve the sound of these old devices. I have already replaced the op-amps, the power supply diodes with Schottky diodes, replaced the old capacitors, and done a DEM reclock of the TDA1540s. In addition to that, I would like to supply a dedicated power source to the SAA7030 and add a new 4.2336 MHz clock. The problem is that I understand the SAA7030, like the SAA7220, can introduce jitter into the clock signal before it enters the TDA1540s.

If I’ve read the service manual schematic correctly, the clock injects 4.2336 MHz into the SAA7000, which then redistributes the frequency to the SAA7020 and also to the SAA7030. Then, the signal passing through the SAA7030 is used to feed both TDA1540s. In my opinion, there shouldn’t be a problem continuing to power the SAA7000 to then feed the SAA7020 and the SAA7030, but it would be necessary to provide a dedicated clock to the two TDA1540s to avoid supplying a frequency from the SAA7030 with too much jitter. I also plan to power the new clock with its own power supply. Has anyone already done this and could offer advice on what and how to do it?

schema 1 philips cd 150.png


schema 2 philips cd 150.png


Here is a link with some explanations I found on internet : Clock mod TDA1540

Thanks by advance for your help guys
 
#3
I feel like what I want to do doesn't make sense after reading the datasheet XD
Because I want to power the TDA1540 with a master clock but it needs a data clock which is useful for synchronizing the audio data sent to the two TDA1540s.
So if both TDAs are powered by a master clock, I'll have problems with the sound.
Correct me if I'm wrong 🙂
 
#5
The SAA7220 is a completely different animal. It is I2S in and out with the channels in serial . The SAA7030 and the TDA1540 predate I2S and the channels are parallel. The way the SAA7030 works with the TDA1540 is that bit clock or /CLFD is not continuous. Using a continuous clock would put the data out of position. Clock, data and latch are not independent of each other. You can use another clock but it will have to maintain a relationship between itself and data and latch coming from the SAA7030. More to the point, given that all /CLFD does is load the TDA1540 and then stop, where is the jitter coming from?
 
#6
I have done what you want to do. You need a good 4.2366 MHz master clock. Feed the SAA7000 from this external clock, and build a reclocker with a 74HC74 dual flip-flop. The reclocker sinchronizes the LAT signal that goes to the TDA1540P with the master clock.
 
#13
So if I want to do the same thing as Icsaszar but without removing the SAA7030, I guess I can do that ?

20241022_074247.jpg

Can you confirm if that diagram is good and if the pins 1, 4, 10, 11, 12, 13, 14 of the 74HC74 should be supplied with +5VDC ?​

​

Thanks for your help ! 😀​

 
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#14
After some researches, I have my answer for the 5VDC question. The answer is yes, it's good on the diagram.
For the other question, the diagram seems good but I had doubts about the CLOX pathway from SAA7000 to SAA7030. Do i keep it like that or can I feed the SAA7030 directly with the master clock ?
Also, I'll use as noted on the diagram a SN74S74N as D flip flop because it is better in term of propagation delay (9ns).
 
#16
Thanks for your answer rfbrw.

"Your circuit is incorrect. STR1 and LAT are not the same thing." >>> You say that because you saw something wrong with the use of the SN74S74N ? I followed to first diagram (provided by Icsaszar) so I don't understand.

"The output of the SAA7030 runs at 4Fs and the output of the SAA7000 at Fs." >>> So that means I can't use the SN74S74N has described in the NOS diagram but with the SAA7030 ? I'm not familiar with the use of D flip flop ICs...

Regards
 
#17
You have at least two choices.You can take clock, data and str1 from the SAA7000 and run at FS aka NOS or clock, data and lat from the SAA7030 and run at 4Fs. What you cannot do is mix them up. You are then ok to use the 74 series D type.
 
#18
Thanks for your advice !
I think in the end that I'll just focus on a dedicated PSU for the SAA7030 (for the +5VDC only), a good decoupling of the power lines, and a low jitter master clock to supply directly the SAA7000. It's maybe a more pragmatic solution to improve the player.
Regards
 
#19
I'm sorry @Marantzien if I confused you. My diagram is a mixture of
  • Conversion to Non-oversampling
  • Use of an external clock
  • Reclocking the LAT signal
You can implement any or all of them. NOS with the TDA1540P will give only 14 bits and aliasing, that might not suit everyone's taste.
 
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