Pass XA25?

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#302
Interesting. My latest sims show these values over the range 20C to 70C heatsink temperature:

  • 50mV difference in Vout
  • 5.5mA difference in Iq
with a single "servo" for Iq. Unfortunately, my current circuit is too sensitive to some component values. I do not know if that can be fixed by adjustmenting other component values.
 
#304
ZM: What assumptions do your simulations make about the junction temperatures of the JFETs, 2nd stage FETs, and output FETs relative to the simulation temperature sweep. I noticed that bottom of the enclosure shown in the XA25 photo does not appear to have any ventilation holes. Could this be intentional so that the case temperature of the FETs in the FE track closely with the heatsink temperature?
 
#306
lhquam said:
Interesting. My latest sims show these values over the range 20C to 70C heatsink temperature:

  • 50mV difference in Vout
  • 5.5mA difference in Iq
with a single "servo" for Iq. Unfortunately, my current circuit is too sensitive to some component values. I do not know if that can be fixed by adjustmenting other component values.
Click to expand...


40mA diff stepping rails from 40 to 15

falling down at 10 and 5V rails

DC offset change in range of 10mV

I believe it shows non critical values , except in setting where trimpot is

(full rotation of 5R trimpot is giving change of 740mA of Iq :rofl: )

regarding junction temp - I'm not exactly advanced LTSpice user , just pasted simple line got from generg (.step TEMP 20 70 5) , and tested accuracu of that line in sims of some of well known circuits/builds , so I resume (and hope) it'll follow even in this case
 
#307
Have you managed to reduce the total number of trimpots per channel to 2 and still be able to adjust for Iq and FE bias currents?

BTW, using a slightly more complicated circuit I am getting 8mV offset change and 1.5mV Iq change for 20C to 70C. Stepping the rails from 20 to 40 I get 18mV offset change and 50mA Iq change at 50C. I haven't tried to optimize this yet.

Other issues to address:

  • K2/K3: The control of even harmonics which exceed the odd harmonics by as much as 40dB without any adjustment. This requires attention at both low and low frequencies.
  • Phase margin and overshoot:
  • PSSR: Can we achieve good bias stability and low PSRR with only the 4 capacitors on the FE board and the 18 capacitors on the PS board, or are there more capacitors on the PS board that cannot be seen?
 
#308
besides CRC in PSU , I have just two caps (4700u/16V) on FE and third between puck gates (10uF)

just one trimpot

of course , speaking of sim

due to other obligations , it'll be in vivo not before a month or so

regarding THD , this is what I'm getting


Harmonic Frequency Fourier Normalized Phase Normalized
Number [Hz] Component Component [degree] Phase [deg]
1 1.000e+03 4.124e+00 1.000e+00 -0.07° 0.00°
2 2.000e+03 1.786e-05 4.331e-06 1.70° 1.77°
3 3.000e+03 1.803e-06 4.372e-07 89.44° 89.51°
4 4.000e+03 6.422e-08 1.557e-08 -178.01° -177.94°
5 5.000e+03 1.902e-08 4.612e-09 -155.46° -155.39°
6 6.000e+03 1.434e-08 3.478e-09 -177.08° -177.01°
7 7.000e+03 1.221e-08 2.961e-09 -177.37° -177.30°
8 8.000e+03 1.067e-08 2.589e-09 -177.78° -177.71°
9 9.000e+03 9.403e-09 2.280e-09 -177.86° -177.79°
10 1.000e+04 8.402e-09 2.037e-09 -177.96° -177.89°
Total Harmonic Distortion: 0.000435%(0.000325%)
 
#310
ZM: Two questions:


  1. How sensitive to choice of JFET Idss are your temperature sweeps? My simulations get best results with JFETs having high Idss.
  2. In your LTSpice temperature sweeps are all devices assumed to be at the temperature specified by the global variable TEMP?
 
#311
1. not sensitive ; even tried changing drain resistance up 50% without significant change in output offset

2. frankly - ZM knows station about that ; command is just one .step TEMP 20 70 5 , it would be logical that entire shebang is influenced

btw . Generg just sent me his own killer iteration ....... superb in every possible way , except it is having higher value for series resistors than I'm willing to accept

so , I'm going to stay with my ( as usual) over-complicated thingie ...... having green all around my head , because my own Wakoo German made it so gracefully

it's pleasure to enjoy Joie de Vivre he's always bringing to this hobby ..... 🙂
 

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#312
:bawling:

I was so delighted with Generg's solution , tried all things - Vcc step , Temp step , THD ..... that I didn't tried one of most important things - longer time sim

bummer , it's oscillating low ...... motorboating

anyway ..... who cares ....... Joie de Vivre is always there ..... fun is in searching new solution

:clown:
 
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