If the digital filter is the SM5842, Guido Tent has a module that replaces it with the SM5847.
ray
ray
There also seems to be 2 versions of this DAC, one with Yamaha receiver-chip, and like mine, with CS8412....
Arne K
Arne K
Cobra2 said:
Any change to that will require more extensive surgery or the construction of a daughter board. The small size of the DF1704 and the SM5847 should make the construction of a daughter board fairly easy. You could also find out if there really is a difference between the DF1700P and the SM5813, the DF1700P being a rebadged SM5813. Lastly you could become a NOSser
and ditch the filter. ray.
I have not heard that the DF1700 is the same as SM5813...The NPC is supposed to be better...and pin-compatible...
The idea of a new type for replacement is more interesting, have sent Guido the question already...
Arne K
The idea of a new type for replacement is more interesting, have sent Guido the question already...
Arne K
You can do that but you might find the SM5813 out of sync with the CS8412. The correct way to do it would be to derive SCLK and FSYNC for the CS8412 from the new 256Fs clock and configure the CS8412 so that SCLK and FSYNC are inputs.
ray.
ray.
Is there such a clock ?
I thaught so, having looked at other dac's...
But why are you clock-makers not making a clock for implementing when there is none?
I have not the time or parts making a board myself...
Arne K
I thaught so, having looked at other dac's...
But why are you clock-makers not making a clock for implementing when there is none?
I have not the time or parts making a board myself...
Arne K
Re: Adding clock
What you should be able to do is to place the oscillator at or near the DAC chips (or I guess in your case the digital filter), and feed the same or a compatible division of this master clock to the source.
This way you are slaving the source off from the DAC. The input receiver should unless you are really unlucky find the digital signal from the source and set it up in a synchronized manner.
I believe there was info on the LC Audio site about this sort of connection some years ago. Try both the Danish (www.lcaudio.dk) and the global (www.lcaudio.com) site as I have sometimes been able to get more information out of accessing both sites 🙂
Feeding a master clock into the input receiver will not work IMVHO since the input receiver can only be slave of one item - and two clocks running separately (one in source, the other in target) will never run close enough over time to enable close synchronization.
Petter
Cobra2 said:
What you should be able to do is to place the oscillator at or near the DAC chips (or I guess in your case the digital filter), and feed the same or a compatible division of this master clock to the source.
This way you are slaving the source off from the DAC. The input receiver should unless you are really unlucky find the digital signal from the source and set it up in a synchronized manner.
I believe there was info on the LC Audio site about this sort of connection some years ago. Try both the Danish (www.lcaudio.dk) and the global (www.lcaudio.com) site as I have sometimes been able to get more information out of accessing both sites 🙂
Feeding a master clock into the input receiver will not work IMVHO since the input receiver can only be slave of one item - and two clocks running separately (one in source, the other in target) will never run close enough over time to enable close synchronization.
Petter
Re: Re: Adding clock
MCLK on the CS8412 is strictly an output signal whatever mode you choose. What can be accepted as input signals are SCLK and FSYNC/LRCLK. In this mode data is double buffered to allow a degree of slippage between the incoming SPDIF data and the incoming SCLK and FSYNC which now clock data out.
ray
Petter said:
MCLK on the CS8412 is strictly an output signal whatever mode you choose. What can be accepted as input signals are SCLK and FSYNC/LRCLK. In this mode data is double buffered to allow a degree of slippage between the incoming SPDIF data and the incoming SCLK and FSYNC which now clock data out.
ray
True, let me be a bit more precise:
The goal should be to have an accurate master clock at the digital filter and/or DAC chip.
The means I described involve making sure the digital source ("CD Player" for example) is effectively in synch with a master oscillator in the DAC.
Thus, it becomes necessary to disregard (cut the trace) from the regenerated MCLK of the input receiver in an appropriate position (depending on implementation, typically safets at or near DAC/DF). Thus, you are left with regenerated BCLK and L/RCKL and SDATA. Most devices are much less susceptible to jitter on these minor clocks than the master clock for obvious reasons.
... and then, unless you are truly unlucky, you should get automagic synchronization.
Petter
The goal should be to have an accurate master clock at the digital filter and/or DAC chip.
The means I described involve making sure the digital source ("CD Player" for example) is effectively in synch with a master oscillator in the DAC.
Thus, it becomes necessary to disregard (cut the trace) from the regenerated MCLK of the input receiver in an appropriate position (depending on implementation, typically safets at or near DAC/DF). Thus, you are left with regenerated BCLK and L/RCKL and SDATA. Most devices are much less susceptible to jitter on these minor clocks than the master clock for obvious reasons.
... and then, unless you are truly unlucky, you should get automagic synchronization.
Petter
The original post was about modifying a DAC not a source. While you suggestion sounds nice in theory, in practice it effectively ties the DAC to the CD player, not the most flexible approach.
The clocks you dismiss as minor are everything to the PCM63 and its ilk, hence the suggestion to derive new ones to drive the CS8412 and the SM5813 rather than use the clocks derived from the SPDIF datastream, bearing they have to pass through the SM5813 before reaching the PCM63.
ray
The clocks you dismiss as minor are everything to the PCM63 and its ilk, hence the suggestion to derive new ones to drive the CS8412 and the SM5813 rather than use the clocks derived from the SPDIF datastream, bearing they have to pass through the SM5813 before reaching the PCM63.
ray
Hi, Ray !
Looked at the circuit (counters), I can get these, but I did not fully understand what signals is going in where...
(I need to be spoon-fed with this digital stuff).
Do you mind filling in the blanks?
Arne K
Looked at the circuit (counters), I can get these, but I did not fully understand what signals is going in where...
(I need to be spoon-fed with this digital stuff).
Do you mind filling in the blanks?
Arne K
Re: Hi, Ray!
I did not get any mail...seems like the mail-engine is having quirks...
Please try again, to cobra2-at-online-dot-no
Arne K
I did not get any mail...seems like the mail-engine is having quirks...
Please try again, to cobra2-at-online-dot-no
Arne K
rfbrw said:
Agree about flexibility
The "minor" clocks could be double-bufferend and passed with the MCLK to clean up jitter.
I don't think "my" recovered "minor" clocks will be any worse than other simple alternatives.
The CS8412 can as noted by others not be driven by external clock. One will have major issues with synchronization of that were possible. An crystal controlled oscillator or a memory based PLL seems more appropriate for such duty.
Petter
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