I have a small question:
Assuming a half-bridge Class-D design based on triangle carrier, with feedback after output filter, is it theoretically possible to parallel two of them for higher current capability and expect equal load sharing, by simply tying the outputs together?
(assuming that both of them have the same input and gain resistors matched within, say, 1%)
Best regards,
Pierre
Assuming a half-bridge Class-D design based on triangle carrier, with feedback after output filter, is it theoretically possible to parallel two of them for higher current capability and expect equal load sharing, by simply tying the outputs together?
(assuming that both of them have the same input and gain resistors matched within, say, 1%)
Best regards,
Pierre
Very risky, for the reason of different offset for example.
Why not parallel output mosfets for lower Rds-on(=even higher efficiency), no problems of matching because of negative tempcoef., still one filter and probably little or no modification to driving stage?
Why not parallel output mosfets for lower Rds-on(=even higher efficiency), no problems of matching because of negative tempcoef., still one filter and probably little or no modification to driving stage?
Yes, it is better to design it for higher current capability from the start, but I was just wondering it it would be possible ;-)
Your reasons (offset, different gains, etc), are convincing, perhaps that can be solved but the extra circuitry (servos, etc) doesn't worth the pain.
Your reasons (offset, different gains, etc), are convincing, perhaps that can be solved but the extra circuitry (servos, etc) doesn't worth the pain.
Even if possible I still won't be very good.
With feedback self-oscillating you have basically no control of phase of HF triangle/square, so every amp will switch in different moments which may cause severe crosstalk between modules. This won't make them any good.
With feedback self-oscillating you have basically no control of phase of HF triangle/square, so every amp will switch in different moments which may cause severe crosstalk between modules. This won't make them any good.
A side note,
The ta2020 data sheet shows how to parallel the outputs.
http://www.tripath.com/downloads/TK2050.pdf
I'm looking forward to see what 41hz comes up with.
The ta2020 data sheet shows how to parallel the outputs.
http://www.tripath.com/downloads/TK2050.pdf
I'm looking forward to see what 41hz comes up with.
Correction
Thats the TA2050 that can be run with paralleled outputs, the TA2020 cannot (as far as I know)
Someone correct me if I am incorrect.
Thats the TA2050 that can be run with paralleled outputs, the TA2020 cannot (as far as I know)
Someone correct me if I am incorrect.
Paralleling
I believe this is correct. It was surprising to see the parallel configuration of the 2050, but taking a closer look you can see that the output transistor pairs on each channel of the 2050 can be driven separately. For the parallel configuration they are driven in phase. In normal bridged mode they would be out of phase.
In the Tripath chips we use, 2020, 2024 etc. the transistor pairs always run out of phase. There is no way to change this, as far as I can see. So connecting the pos and neg sides together would cause the signal current to flow thru a zero Ohm load. The chip might not like that.
john65b said:
I believe this is correct. It was surprising to see the parallel configuration of the 2050, but taking a closer look you can see that the output transistor pairs on each channel of the 2050 can be driven separately. For the parallel configuration they are driven in phase. In normal bridged mode they would be out of phase.
In the Tripath chips we use, 2020, 2024 etc. the transistor pairs always run out of phase. There is no way to change this, as far as I can see. So connecting the pos and neg sides together would cause the signal current to flow thru a zero Ohm load. The chip might not like that.
Bruno Putzeys was granted a patent that teaches paralleled class-D amp. Just do a search at USPTO or EPO to dig that patent up.
In general, it's easier to design for more power from the outset, than to parallel class-D amps (2x more parts)
Bruno uses a transformer to force equal output current from each half-bridge. In practice he doesn't use his own scheme to get higher power from his UcD.
In general, it's easier to design for more power from the outset, than to parallel class-D amps (2x more parts)
Bruno uses a transformer to force equal output current from each half-bridge. In practice he doesn't use his own scheme to get higher power from his UcD.
Yes I meant tk2050
For the tk2050 why you might want to parallel output is to be able to driver lower ohm loads and sqeeze out more power.
For the tk2050 why you might want to parallel output is to be able to driver lower ohm loads and sqeeze out more power.
You can parallel 2 modules provided you have placed extra inductors after the outputs and then join the outputs after those extra inductors. Those extra inductors must be around 2-4uH max. This will ensure isolation and better current sharing.
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