Supply voltage of my design is +1.8V. I have an on chip negative converter in my design which converts +1.8 to -1.8V(ideally).It generates a negative voltage of around -1.78 to -1.7V with ripple of 100mV peak to peak.I need to decrease that ripple on the negative voltage converter.So, I need a block which regulates that ripple from 100mV to 12mV.That block should be on chip.Is it possible to do that?
I have an on chip negative converter in my IC design which converts +1.8 to ... a negative voltage of around -1.78 to -1.7V with ripple of 100mV peak to peak. I need to decrease the ripple on the negative voltage converter's output. So, I need a block which regulates that ripple from 100mV to 12mV. That block should be on chip. Is it possible to achieve this in 180nm CMOS technology?
Yes it is possible. Reducing the ripple will increase the silicon area and increase the power consumption. It may also reduce the magnitude of the negative voltage.
A very expensive way to accomplish this is: use a charge pump voltage doubler to convert your -1.7 volt supply, into a -3.4 volt supply (with even more ripple). Then build a series pass voltage regulator (CMOS equivalent of the LM7805) which takes -3.4 volts in and produces -1.8 volts out, with very low ripple. You may need to use thicker gate oxide transistors (designed for I/O uses) to withstand the -3.4 volt oxide stress.
But that's just a thought experiment, an "existence proof" which demonstrates that it is possible, at least in theory. In practice you will want to consult with other experienced designers to engineer a low cost solution. Ideally, long before your design review.
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