Apologies if this has been discussed elsewhere but what's the rational for using such relatively high values in the feedback loop of the typical 3875/3886 circuit. The data sheets leave it at an unexplained:
The standard sample circuits use Rf1=20K, Ri=1k. Why not Rf1=2K, Ri=100? The smaller Ri injects less resistor noise into the negative port, which also sees a ten times reduction in source impedance, and the output certainly won't notice the drive difference. For AC-coupled inputs it makes little difference to the DC source impedance balance between positive and negative input. As well, at higher frequencies few modern source devices (assuming a buffered drive stage) have a Zout high in the 1K-680 range.
Is it a DC balance issue?
The standard sample circuits use Rf1=20K, Ri=1k. Why not Rf1=2K, Ri=100? The smaller Ri injects less resistor noise into the negative port, which also sees a ten times reduction in source impedance, and the output certainly won't notice the drive difference. For AC-coupled inputs it makes little difference to the DC source impedance balance between positive and negative input. As well, at higher frequencies few modern source devices (assuming a buffered drive stage) have a Zout high in the 1K-680 range.
Is it a DC balance issue?
Reasons for choosing higher resistor values?
In the design example in the datasheet it says
Another reason to choose higher resistor values for the feedback loop is, that lower values lead to higher current through the resistors. Higher current means they heat up, and due to their different values they do that with different power dissipation. Depending on the temperature coefficient that can lead to additional distortion.
To be honest, I think neither the Nyquist-Johnson noise, nor the DC offset produced by the feedback loop, nor the temperature are effects that are worth much worries in a chipamp.
The most probable explanation is that the recommended values are chosen to improve CMRR, by making Ri = Rb and Rf = Rin and everything that is in parallel with Rin.
In the design example in the datasheet it says
Another reason to choose higher resistor values for the feedback loop is, that lower values lead to higher current through the resistors. Higher current means they heat up, and due to their different values they do that with different power dissipation. Depending on the temperature coefficient that can lead to additional distortion.
To be honest, I think neither the Nyquist-Johnson noise, nor the DC offset produced by the feedback loop, nor the temperature are effects that are worth much worries in a chipamp.
The most probable explanation is that the recommended values are chosen to improve CMRR, by making Ri = Rb and Rf = Rin and everything that is in parallel with Rin.
Thanks pacificblue. I hadn't considered the possibility of thermal non-linearity in the feedback loop. To be honest though it appears easily surmountable with device selection. Not sure what to make of the DC offset note, if the resistive divider ratios are identical so should be the offset that appears at the error correction pin.
May be justification to do some benching.
May be justification to do some benching.
The quote says "DC offsets at the output". That is the practical effect of CMRR. If Ri = Rb and Rf = Rin, the offset will be minimal. Since Rin is usually fixed first, the value of Rf has to be chosen accordingly.
one of the Forum's chipamp schematics makes a big play on low values of Rin and NFB resistor values.
I think it may be Carlos FM's version.
For a DC coupled chipamp, low value resistors are no great disadvantage, provided peak signals do not give temperature induced distortions.
For an AC coupled chipamp or an inverting chipamp, low values resistors are an enormous disadvantage, to the point that the circuit becomes almost undriveable/unbuildable.
I think it may be Carlos FM's version.
For a DC coupled chipamp, low value resistors are no great disadvantage, provided peak signals do not give temperature induced distortions.
For an AC coupled chipamp or an inverting chipamp, low values resistors are an enormous disadvantage, to the point that the circuit becomes almost undriveable/unbuildable.
Balanced CMRR impedances aren't really applicable here, the positive and negative inputs under most circumstances see completely different AC and DC circuits. Consider a LM3875 fed by a potentiometer, Ri varies from zero to 1/4 the pot impedance. Given the completely different physical layouts little opportunity presents itself for equal level (or true) common mode interference on both terminals. For the non-inverting topology of interest, the DC impedance/voltage on the positive terminal will either be that of the source (40 mV for my DAC!) or infinite impedance (the cap) and a measured ~1.5mV for my AC coupled LM3875. The DC offset on the output is ~60mV, correlating better with the topology's gain than the chip's CMRR.
Andrew, I surfed as much of Carlo as I could but couldn't find anything past the T-network stuff. A bit surprising that it appears no one's played with this aspect given most implementations have less than a handful of parts!
the usual values are just convenient. One practical method of lowering offset voltages is stop amplifying them. A small electrolytic does the trick! 😉
regards
regards
Head slap! Is that the answer? Larger resistors mean a smaller blocking cap in the feedback path. The recommendations are "everyman's" values.
- Status
- Not open for further replies.