So I've finally got the nice clock into the CD. I upgraded my Arcam Alpha 5 CD player and now its of completely different league. This is how the complete module and some I2S reclocking looks inside the trusty Arcam.
The clock module is based on the PFM "The Flea" schematic but I used my own PCB design. More info is available HERE
Regards,
Venci
The clock module is based on the PFM "The Flea" schematic but I used my own PCB design. More info is available HERE
Regards,
Venci
Neat looking pcb, thanks for sharing. Have you thought about using picogates for the I2C reclocking and what about DEM reclocking next ?
Hi,
by PicoGate you probably mean the SMD series of logic ic's froo NXP(Philips). Actually the PCB uses two 1G(two of them) family inverters to buffer the oscillator's output. Actually the picture is there just to show how the module looks. It also shows the most common way of reclocking the I2S bus - using a quad flip-flop to reclock the whole bus. At the moment I'm not actually using this method. I just use a simple frequency divider to feed to pin 2 and pin 4 of the DAC chip. Again, I use a TH IC since it's easier to use it on breadboard. My next project will have all frequencies needed for reclocking and DEM reclocking (using the 1G family logic). This way a minimum number of external components will be required.
Regards,
Venci.
by PicoGate you probably mean the SMD series of logic ic's froo NXP(Philips). Actually the PCB uses two 1G(two of them) family inverters to buffer the oscillator's output. Actually the picture is there just to show how the module looks. It also shows the most common way of reclocking the I2S bus - using a quad flip-flop to reclock the whole bus. At the moment I'm not actually using this method. I just use a simple frequency divider to feed to pin 2 and pin 4 of the DAC chip. Again, I use a TH IC since it's easier to use it on breadboard. My next project will have all frequencies needed for reclocking and DEM reclocking (using the 1G family logic). This way a minimum number of external components will be required.
Regards,
Venci.
Hi,
Yes I was thinking of using the NXP PicoGates to reclock each I2C line individually rather than clocking them all through a single device (like Arcam did in the Alpha 5+ and you've done on the veroboard). You'll find further gains from the DEM reclocking if you haven't done it before. Separate local regulators for the DAC and filter will help too.
Regards,
Jon
Yes I was thinking of using the NXP PicoGates to reclock each I2C line individually rather than clocking them all through a single device (like Arcam did in the Alpha 5+ and you've done on the veroboard). You'll find further gains from the DEM reclocking if you haven't done it before. Separate local regulators for the DAC and filter will help too.
Regards,
Jon
I no longer use one IC to reclock the I2S bus. The result wasn't satisfactory. This is an old photo just to show how the module looks like.
Regards,
Venci
Regards,
Venci
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