What are everybody's thoughts on this French class A amp schematic?
It seems simple enough, even for first time builder but uses rather expensive devices so what could be caveats building this circuit but also can it be rewarding one, if done correctly?
http://perso.wanadoo.fr/jm.plantefeve/sche.html
argo
It seems simple enough, even for first time builder but uses rather expensive devices so what could be caveats building this circuit but also can it be rewarding one, if done correctly?
An externally hosted image should be here but it was not working when we last tested it.
http://perso.wanadoo.fr/jm.plantefeve/sche.html
argo
hmmm P-channel on the +ve rail and the N-channel on the -ve rail....
seems like you'd be relying on the transconductance of the 'driver' stage matching the output to get any sort of linearity.
the BUZ900/905 have a transconductance of about 1.2S , I don't know offhand what the value for 2SK389 dual-jfets are , but it'll likely be a lot higher.
Mr Pass , you've played with these iirc what do you think? am I barking up the wrong tree?
interesting simple design though.
ray
seems like you'd be relying on the transconductance of the 'driver' stage matching the output to get any sort of linearity.
the BUZ900/905 have a transconductance of about 1.2S , I don't know offhand what the value for 2SK389 dual-jfets are , but it'll likely be a lot higher.
Mr Pass , you've played with these iirc what do you think? am I barking up the wrong tree?
interesting simple design though.
ray
there parallels to be drawn between this design, and the valleman amp. discussed in the following thread..
http://www.diyaudio.com/forums/showthread.php?s=&threadid=5365
http://www.diyaudio.com/forums/showthread.php?s=&threadid=5365
Another variation
http://www.ne.jp/asahi/evo/amp/J200K1529/exp1.gif
The BUZ900D/905D are rated at 250W. If you don't want all the power just use the 125W non 'D' version, they are only about $7.
http://www.ne.jp/asahi/evo/amp/J200K1529/exp1.gif
The BUZ900D/905D are rated at 250W. If you don't want all the power just use the 125W non 'D' version, they are only about $7.
..dotted lines
the dotted lines are usually there to signify that the devices inside are physically coupled together inside a common package.
it's quite common in analogue designs where you have 2 ( or sometimes more ) transistors in the same package.
sometimes they share a common pin , usually not.
2 fets or 2 bjt's in one package is fairly common, there are also 8-pin and 14-pin DIL packages with 2 or more transistors in , sometimes with an extra pin marked 'substrate' which usually you leave unconnected , depends on the device.
as for matching transistors, well I guess you could match them in every design , but usually the designer will tell you which ones are really needed ( often parallel output stages are matched for even power dissipation , or for clipping point across split rails )
sometimes differential pairs are matched to even response etc.
with bias, I usually set the trimpot to minimum bias, and slowly increase it whilst measuring it's effects , to the value that the designer has given , and occasionally beyond just to see it's effect. you have to be a little careful though 'cos in many designs too much will cause unpleasant things to happen
HTH
ray
the dotted lines are usually there to signify that the devices inside are physically coupled together inside a common package.
it's quite common in analogue designs where you have 2 ( or sometimes more ) transistors in the same package.
sometimes they share a common pin , usually not.
2 fets or 2 bjt's in one package is fairly common, there are also 8-pin and 14-pin DIL packages with 2 or more transistors in , sometimes with an extra pin marked 'substrate' which usually you leave unconnected , depends on the device.
as for matching transistors, well I guess you could match them in every design , but usually the designer will tell you which ones are really needed ( often parallel output stages are matched for even power dissipation , or for clipping point across split rails )
sometimes differential pairs are matched to even response etc.
with bias, I usually set the trimpot to minimum bias, and slowly increase it whilst measuring it's effects , to the value that the designer has given , and occasionally beyond just to see it's effect. you have to be a little careful though 'cos in many designs too much will cause unpleasant things to happen
HTH
ray
Thank you guys for your input.
djk
Thank you for the hint
Mr. Pass
Very nice tip. Also if you don’t mind - because of my rather limited English - what did you meant by "swell design". Does it have a tendency to swell in a meaning that it's not complete and will end up with much more components around or meaning it’s OK an acceptable just as it is?
I tried to run some spice simulation (only 2SJ162/2SK1058 models were used instead) and seems it works fine except highish DC offset in output. Cascading or paralleling input fets doesn’t seem to make any difference in output waveform and THD. Very interesting.
Luke
Dotted lines around transistor pairs means it's factory built dual transistor and hopefully it doesn’t need matching or else how could you do that.
Usually parallel devices are needed to be matched I think. When to mach devices and how to adjust the bias current and to what value needs a bit broader explanation. I'll leave these Q to more experienced board members.
argo
djk
Thank you for the hint
Mr. Pass
Very nice tip. Also if you don’t mind - because of my rather limited English - what did you meant by "swell design". Does it have a tendency to swell in a meaning that it's not complete and will end up with much more components around or meaning it’s OK an acceptable just as it is?
I tried to run some spice simulation (only 2SJ162/2SK1058 models were used instead) and seems it works fine except highish DC offset in output. Cascading or paralleling input fets doesn’t seem to make any difference in output waveform and THD. Very interesting.
Luke
Dotted lines around transistor pairs means it's factory built dual transistor and hopefully it doesn’t need matching or else how could you do that.
Usually parallel devices are needed to be matched I think. When to mach devices and how to adjust the bias current and to what value needs a bit broader explanation. I'll leave these Q to more experienced board members.
argo
LukeLuke said:After my current project I may try building from schematic, sounds challenging. Think im guilty of thread jacking again, sorry Argo
No need for sorry - I am trying to learn about these things more here also.
I am very tempted to try that schematic also. Just takes to much time to order these small dual fets in my country to tell any results soon. If you (or somebody else) gets this thing working, please share your experiences. I know at least one member (he is also from my country) who is fiddling with a similar circuit. I just tempting him here to post his ideas soon.
argo
Argo,
Good luck, I have a similar problem getting stuff here too, but have you tried Digikey.com, they have reasonable prices but not sure about freight costs. As for Nelsons post, swell is an expression, it means good Its a thumbs up and his suggestions about trying without cascoding is a sugestion for improving the circuit. Unfortunately I dont know what cascoding stages are
Good luck, I have a similar problem getting stuff here too, but have you tried Digikey.com, they have reasonable prices but not sure about freight costs. As for Nelsons post, swell is an expression, it means good
Its a thumbs up and his suggestions about trying without cascoding is a sugestion for improving the circuit. Unfortunately I dont know what cascoding stages areLuke said:Argo,
Good luck, I have a similar problem getting stuff here too, but have you tried Digikey.com, they have reasonable prices but not sure about freight costs. As for Nelsons post, swell is an expression, it means good
to hear thatI was
because Nelson likes to 
with words some times
There is
article on Cascode Amp Design by Nelson Pass http://www.passlabs.com/pdf/cascode.pdf
argo
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