Hi all,
After successfully designed and build a 4kW basic full-bridge non-resonant SMPS, I would like to move further. The way to go would be a full-bridge constant-frequency phase-shift ZVS power supply controlled by UCC3895 from Unitrode (Texas Instruments)
In the document SLUU069A (http://www-s.ti.com/sc/psheets/sluu069a/sluu069a.pdf), there is a schematic of a power supply, and that would be my starting point. I understand nearly everytning, but I will need help with one, probably most important design step: Resonant components (transformer's serial inductor value and MOSFET parallel capacitors value). First, I though that we only need to connect some parallel capacitors to MOSFETs to obtain a resonant circuit with transformer's leakage inductance. But, there are no parallel capacitors in SLUU069A datasheet, but there is a 0,47uH serial inductance in series with the transformer's primary winding.
Could anybody explain these things for me, please?
After successfully designed and build a 4kW basic full-bridge non-resonant SMPS, I would like to move further. The way to go would be a full-bridge constant-frequency phase-shift ZVS power supply controlled by UCC3895 from Unitrode (Texas Instruments)
In the document SLUU069A (http://www-s.ti.com/sc/psheets/sluu069a/sluu069a.pdf), there is a schematic of a power supply, and that would be my starting point. I understand nearly everytning, but I will need help with one, probably most important design step: Resonant components (transformer's serial inductor value and MOSFET parallel capacitors value). First, I though that we only need to connect some parallel capacitors to MOSFETs to obtain a resonant circuit with transformer's leakage inductance. But, there are no parallel capacitors in SLUU069A datasheet, but there is a 0,47uH serial inductance in series with the transformer's primary winding.
Could anybody explain these things for me, please?
You should investigate further into the behaviour of your 4Kw full bridge, you will find in it the reply to your question.
Every time one switch turns off, the voltage in the corresponding side of the primary winding springs violently towards the rail opposite to the one that it was switched to. This happens because there is some energy stored in primary winding leakage inductance that has to be returned to the power supply.
If the opposite switch is turned on before all that energy is discharged, then ZVS is achieved. This requires either duty cycles approaching 100% or phase-shifted operation.
The 0.47uH inductor is here just to increase effective leakage inductance thus making its discharge time longer and making it easier to turn on the right switch in time.
There are no additional components required for ZVS operation in phase-shifted full bridges or in unregulated half/full bridges.
I feel this topic is usually misunderstood.
Every time one switch turns off, the voltage in the corresponding side of the primary winding springs violently towards the rail opposite to the one that it was switched to. This happens because there is some energy stored in primary winding leakage inductance that has to be returned to the power supply.
If the opposite switch is turned on before all that energy is discharged, then ZVS is achieved. This requires either duty cycles approaching 100% or phase-shifted operation.
The 0.47uH inductor is here just to increase effective leakage inductance thus making its discharge time longer and making it easier to turn on the right switch in time.
There are no additional components required for ZVS operation in phase-shifted full bridges or in unregulated half/full bridges.
I feel this topic is usually misunderstood.
Eva said:
I tend to disagree, capacitance IS needed for proper ZVS. In some cases mosfet internal capacitances are big enough. Without some capacitance at switch-off voltage will slew with very high speed and proper timing might be impossible for opposite switch. Also switch-off stresses for mosfet are bigger without some capacitance, with cap parallei over switch currents go trhu cap, and not ending up in swich-off losses
Extra inductance is there to ensure ZVS at lighter loads, you need certain amout of energy to load caps(mosfet internal and/or external) to archieve ZVS condition. For same reason transformer core is sometimes capped to increase magnetisation current to make ZVS possible at light loads.
I hope this picture helps in understanding zero-voltage switching:
It shows the turn-off process of one of the lower switches of a conventional full-bridge in an actual circuit. Switching devices are MJE13009 bipolar transistors with proportional drive. Red trace is collector voltage at 50V/div, so supply voltage was 250V. Blue trace is transformer current in 2.5A/div, so Ic was approx 6A before turn-off. Timing is 200ns/div. Power output was about 1KW when waveforms were captured. This circuit operates at 35Khz so primary leakage inductance is high, current rise and fall slopes suggest a 10uH figure.
Note how this inductance starts discharging (through the 1nF and 47 ohm RC snubber placed across the primary winding) as the switch turns off and collector voltage rises. Also note how it continues discharging through the freewheeling diode during the following 250ns.
Should the opposite switch be turned on during this 250ns period, then ZVS would be achieved since voltage drop across that switch would be very small.
However, achieving ZVS over a broad current range is a hard task since voltage rise time after turn-off is inversely proportional to primary winding current. No added combination of capacitors or inductors will solve that as slew rates are always proportional to current. The problem is actually solved by adding extra leakage inductance to the primary winding and by monitoring voltage at both ends of the bridge with comparators, so that the switches could be turned on in the right instant during discharge. I think I've seen some IC that does that.
An externally hosted image should be here but it was not working when we last tested it.
It shows the turn-off process of one of the lower switches of a conventional full-bridge in an actual circuit. Switching devices are MJE13009 bipolar transistors with proportional drive. Red trace is collector voltage at 50V/div, so supply voltage was 250V. Blue trace is transformer current in 2.5A/div, so Ic was approx 6A before turn-off. Timing is 200ns/div. Power output was about 1KW when waveforms were captured. This circuit operates at 35Khz so primary leakage inductance is high, current rise and fall slopes suggest a 10uH figure.
Note how this inductance starts discharging (through the 1nF and 47 ohm RC snubber placed across the primary winding) as the switch turns off and collector voltage rises. Also note how it continues discharging through the freewheeling diode during the following 250ns.
Should the opposite switch be turned on during this 250ns period, then ZVS would be achieved since voltage drop across that switch would be very small.
However, achieving ZVS over a broad current range is a hard task since voltage rise time after turn-off is inversely proportional to primary winding current. No added combination of capacitors or inductors will solve that as slew rates are always proportional to current. The problem is actually solved by adding extra leakage inductance to the primary winding and by monitoring voltage at both ends of the bridge with comparators, so that the switches could be turned on in the right instant during discharge. I think I've seen some IC that does that.
Check unitrode spms seminars, best online source for these things. And even free!
http://focus.ti.com/general/docs/training/trainingevents.tsp?familyId=2
http://focus.ti.com/lit/ml/slup111/slup111.pdf
http://focus.ti.com/lit/ml/slup102/slup102.pdf
http://focus.ti.com/lit/ml/slup101/slup101.pdf
http://focus.ti.com/lit/ml/slup089/slup089.pdf
http://focus.ti.com/lit/ml/slup092/slup092.pdf
Of course it can be true that almost everyone might be wrong about ZVS principles and Eva is right, altough I belive that unitrode has _some_ experience in these things...
http://focus.ti.com/general/docs/training/trainingevents.tsp?familyId=2
http://focus.ti.com/lit/ml/slup111/slup111.pdf
http://focus.ti.com/lit/ml/slup102/slup102.pdf
http://focus.ti.com/lit/ml/slup101/slup101.pdf
http://focus.ti.com/lit/ml/slup089/slup089.pdf
http://focus.ti.com/lit/ml/slup092/slup092.pdf
Of course it can be true that almost everyone might be wrong about ZVS principles and Eva is right, altough I belive that unitrode has _some_ experience in these things...
There is no statement on these papers contradicting my point of view. They just analyze and use circuit parasitistics, that's why you see additional capacitors and inductors on their theoretical schematics, but actually they don't add paralell capacitors to bridges because this dramatically increases the minimum load required for ZVS operation and reduces maximum duty cycle thus reducing efficiency. Furthermore, using paralell capacitors in constant frequency circuits or without ZVS sensing can increase losses and EMI radiation dramatically due to hard switching when the load is not high enough to achieve ZVS.
You should know that by increasing capacitance in any resonant circuit you are actually damping it and preventing it to resonate!. They also use comparators to sense zero-voltage condition and turn on the switches in the right instant as I mentioned. They don't rely on a particular resonant behavior created with additional components.
I have to emphasize: There is a lot of misunderstanding about ZVS.
You should know that by increasing capacitance in any resonant circuit you are actually damping it and preventing it to resonate!. They also use comparators to sense zero-voltage condition and turn on the switches in the right instant as I mentioned. They don't rely on a particular resonant behavior created with additional components.
I have to emphasize: There is a lot of misunderstanding about ZVS.
ZVS action
I'll throw my oar into this furore in the hope that it helps.
My understanding of ZVS is that for full ZVS action to occur, a certain minimum energy is stored in the 'parasitic' inductance. This may be either the inherent leakage inductance of the trafo alone, or in combination with an additional series L to make up the necessary value. Adding an external inductance may help to achieve ZVS at lower currents, but it impacts negatively on the overall efficiency of the converter because on the power delivery cycle there is a voltage drop across the external inductance.
Also, because of the energy in an inductor being 0.5 * L * I ^ 2, the current through the switch determines the energy stored in the 'parasitic' L. This is why ZVS requires a minimum load. Where this is inconvenient, gapping the core helps, because it increases the magnetisation current. In a ZVS converter you can get away with this because you get back most of the energy due to the increased magnetisation current. The energy you don't get back is lost in the copper windings of the trafo, which needs to be generously designed.
To my mind the capacitor value does not effect the quantity of energy stored because the energy is primarily stored in the 'parasitic' inductance which then resonates with the 'parasitic' capacitance. The capacitance value will affect the frequency of resonance and hence the system timings i.t.o. dead time.
The MicroLinear Application note 19, now presented by Fairchild, is in my opinion a straightforward, simple explanation of the ZVS process for a phase shifted full bridge. It's like ZVS for dummies and I would suggest it be read before the TI articles. This app note may be found at:
http://www.fairchildsemi.com/an/AN/AN-42026.pdf
I'll throw my oar into this furore in the hope that it helps.
My understanding of ZVS is that for full ZVS action to occur, a certain minimum energy is stored in the 'parasitic' inductance. This may be either the inherent leakage inductance of the trafo alone, or in combination with an additional series L to make up the necessary value. Adding an external inductance may help to achieve ZVS at lower currents, but it impacts negatively on the overall efficiency of the converter because on the power delivery cycle there is a voltage drop across the external inductance.
Also, because of the energy in an inductor being 0.5 * L * I ^ 2, the current through the switch determines the energy stored in the 'parasitic' L. This is why ZVS requires a minimum load. Where this is inconvenient, gapping the core helps, because it increases the magnetisation current. In a ZVS converter you can get away with this because you get back most of the energy due to the increased magnetisation current. The energy you don't get back is lost in the copper windings of the trafo, which needs to be generously designed.
To my mind the capacitor value does not effect the quantity of energy stored because the energy is primarily stored in the 'parasitic' inductance which then resonates with the 'parasitic' capacitance. The capacitance value will affect the frequency of resonance and hence the system timings i.t.o. dead time.
The MicroLinear Application note 19, now presented by Fairchild, is in my opinion a straightforward, simple explanation of the ZVS process for a phase shifted full bridge. It's like ZVS for dummies and I would suggest it be read before the TI articles. This app note may be found at:
http://www.fairchildsemi.com/an/AN/AN-42026.pdf
Re: ZVS action
Now what i quicky found in this appnote:
"Sometimes in order to further reduce the turn-off losses
additional capacitance may be necessary across the
drain-source of each MOSFET."
Circuit working like Eva suggests(without any sort of cap) results in unneccessary turn-off losses, i.e. Ploss=0.25*U*I*Tf where U is peak voltage, I is peak current at turn-off and Tf is fall time of power switch. With something like 50ns fall times and 200khz operation these losses are easily bigger than Rds on losses.
With perfect timing it is of course possible to archieve ZVS turn-on without caps but no way to archieve "soft" turn-off. Perfect timing is hard to make work at 200khz, un-obtanium one might say. Its shoot-trough or bangbang body-diode
Eva, imagine your power switch opening lets say in 100ns with 10Amps at 400V going thru it. In middle of off-transition it has enormous peak dissipation, kilowatts in peak. Now add some capacitance across this opening switch and Voila, most of the current starts going trough this cap when you open switch and when cap is loaded to bigger voltage your switch is already completely open and not half-open.
phew. I had to find thicker wire to bend.
I agree, cap is there A. because its parasitic piece of **** and B. you might want it to be there.John Hope said:
Now what i quicky found in this appnote:
"Sometimes in order to further reduce the turn-off losses
additional capacitance may be necessary across the
drain-source of each MOSFET."
Circuit working like Eva suggests(without any sort of cap) results in unneccessary turn-off losses, i.e. Ploss=0.25*U*I*Tf where U is peak voltage, I is peak current at turn-off and Tf is fall time of power switch. With something like 50ns fall times and 200khz operation these losses are easily bigger than Rds on losses.
With perfect timing it is of course possible to archieve ZVS turn-on without caps but no way to archieve "soft" turn-off. Perfect timing is hard to make work at 200khz, un-obtanium one might say. Its shoot-trough or bangbang body-diode
Eva, imagine your power switch opening lets say in 100ns with 10Amps at 400V going thru it. In middle of off-transition it has enormous peak dissipation, kilowatts in peak. Now add some capacitance across this opening switch and Voila, most of the current starts going trough this cap when you open switch and when cap is loaded to bigger voltage your switch is already completely open and not half-open.
phew. I had to find thicker wire to bend.
Hey, thank you all for your replies.
I found a datasheet directly from TI about designing the supply at http://www-s.ti.com/sc/psheets/slua107/slua107.pdf . But I do not understand one thing in there. Could you take a look on the datasheet for me?
On page 9, they get that long final equation starting Lr= ...
I understand this, but how the hell do I get that t(max) value?
On page 8, they calculate t(max) as pi/2xWr, but one row above, they need Lr to get Wr
I checked it few times but I still do not know wtf...
Could pleace somebody explain, what they mean with that??
I found a datasheet directly from TI about designing the supply at http://www-s.ti.com/sc/psheets/slua107/slua107.pdf . But I do not understand one thing in there. Could you take a look on the datasheet for me?
On page 9, they get that long final equation starting Lr= ...
I understand this, but how the hell do I get that t(max) value?
On page 8, they calculate t(max) as pi/2xWr, but one row above, they need Lr to get Wr
I checked it few times but I still do not know wtf...
Could pleace somebody explain, what they mean with that??
I am in no way an expert, but my tiny head can do a little math =)
Isn't the "t(max)" value a constant, derived from the switching frequency, being at most one fourth of the switching cycle?
(ex. with switching frequency 100kHz, t(max) becomes < 2.5uS)
....please correct me if I'm wrong, anyone
EDIT
The formula for t(max) can be explained like:
t(max) = ( pi / 2Wr )
where Wr(rad/s) = 2(pi)f
thus: t(max) ==> ( pi / 2 ) * Wr ==> pi / 2(2(pi)f ) ==> 1/(4 * f)
1 / ( 4*f ) = 0.25T ( T=switching period )
Isn't the "t(max)" value a constant, derived from the switching frequency, being at most one fourth of the switching cycle?
(ex. with switching frequency 100kHz, t(max) becomes < 2.5uS)
....please correct me if I'm wrong, anyone
EDIT
The formula for t(max) can be explained like:
t(max) = ( pi / 2Wr )
where Wr(rad/s) = 2(pi)f
thus: t(max) ==> ( pi / 2 ) * Wr ==> pi / 2(2(pi)f ) ==> 1/(4 * f)
1 / ( 4*f ) = 0.25T ( T=switching period )
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