Modifying a TDA1549-based CDP to act as a DAC

3dNow

Member
2016-03-17 2:28 pm
Just buy a little spdif to i2s board like this and give it a try , it's cheap and it can always be usefull if you want to play with other philips cd players or just tda dac :

AK4113 Digital Receiver Board Spdif TO I2S Converter Softwear Control LCD | eBay

If after trying I2S, left justifying, Right justifying 16bit and Right justifying 24bit it does not work it will necessitate some logic to convert the i2s signal to be fully recognised by the dac (but this requires far too much abilities for me) ;)
 
Bit more information. The TDA1549 has EIAJ input (standard Japanese input format) which is slightly different to I2S.

Here's the difference:
Hk8YAvi.jpg


Any idea which chip would allow me to directly convert USB or S/PDIF to EIAJ or would I have to go USB or S/PDIF > I2S > EIAJ > TDA1549? Either way, appears that it would require some logic to get it working.
 
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3dNow

Member
2016-03-17 2:28 pm
Oh my, i completely forget about thoses cirrus logic chips like CS8414 or CS8406 that are EIAJ complient that you can find on a SOIC28 to DIP28 board on ebay :eek:

It was part of a project i never finished where the goal was to get digital out from a GUS Max sound card for maximum quality recordings (it was like 3 or 4 years ago btw) :rolleyes:

It was definatly too expensive for my taste at that time ;)
 
I'm just assuming that the 'Standard Japanese input format' stated on the datasheet means EIAJ tbh, deduced from the meagre information I managed to find on the web. Is that true?

Good question. What are the specifics of the Japanese input format, which specific EIAJ standard, and how closely does the TDA1549 follow the standards? The names of things don't tell much about them. For example, there is a recognized standard for I2S but few interfaces called I2S adhere to the standard.

In the end you have to study the datasheet. The TDA1549 has unusual data input requirements that cannot be met with the usual ebay crap.
 
Yeah, that's true. I'm finding it a little hard to decipher the datasheet but I reckon this is the most important bit of figuring out a solution:

'The circuit accepts four times oversampled data in 18-bit
two's complement standard Japanese format with MSB
first. Left and right data channel words are time
multiplexed. The input format is illustrated in Fig.5. The bit
clock (BCK) operates at 192fs, i.e. 48 times the word select
(WS) frequency of 4fs.'

and this:
vXYIdxU.png
 

3dNow

Member
2016-03-17 2:28 pm
Good question. What are the specifics of the Japanese input format, which specific EIAJ standard, and how closely does the TDA1549 follow the standards? The names of things don't tell much about them. For example, there is a recognized standard for I2S but few interfaces called I2S adhere to the standard.

In the end you have to study the datasheet. The TDA1549 has unusual data input requirements that cannot be met with the usual ebay crap.

And you are totally helping by telling him to read the datasheet and make himself deduce something like that alone and be able to make it ;)

This circuit works on the same principle. Invert the LRCLK signal, and delay the DATA line by 7 cycles ( for 16 bits data ).
Again, I used a 74HCT04 for the inverters, and a 74HCT374 wired as a shift register.
Again BCK is inverted to clock the shift register. DATA is inverted twice to delay it by two gates propogation delay. LRCLK is inverted.
I have not built this circuit but had been told by someone who did that the circuit works. It should as it is really quite simple.
The usual 100 ohm damping resistors are good practice.
Is it easier to give a try with an already built fonctionnal device than can be useful later (that can maybe be tweaked to meet his requierments) or build something from ground with some obscure digital receiver/transmitter and deduction he apparently has to do alone ? :rolleyes:
 
Is it easier to give a try with an already built fonctionnal device than can be useful later (that can maybe be tweaked to meet his requierments) or build something from ground with some obscure digital receiver/transmitter and deduction he apparently has to do alone ? :rolleyes:

You're right, my bad. Now, why don't you tell us how to tweak the I2s board you suggested to meet the input requirements of the TDA1549?

While we're waiting for 3dNow to give us the solution, Mr. Bucket should get the Marantz service manual to learn more about the implementation Marantz used. Also read up on the XMOS USB receiver because with a little bit of software you can get the digital audio data in any format you desire.

I know the JLSounds XMOS board supports the AD1865, which is an 18-bit DAC but its interface is dual-mono, not interleaved stereo. It shouldn't be hard to modify the code to output 18-bit interleaved in a 48-bit frame as expected by the TDA1549.
 
And you are totally helping by telling him to read the datasheet and make himself deduce something like that alone and be able to make it ;)

Is it easier to give a try with an already built fonctionnal device than can be useful later (that can maybe be tweaked to meet his requierments) or build something from ground with some obscure digital receiver/transmitter and deduction he apparently has to do alone ? :rolleyes:

You're right, my bad. Now, why don't you tell us how to tweak the I2s board you suggested to meet the input requirements of the TDA1549?
I appreciate the sentiments guys but please, let's be civil here, ok? :)

While we're waiting for 3dNow to give us the solution, Mr. Bucket should get the Marantz service manual to learn more about the implementation Marantz used. Also read up on the XMOS USB receiver because with a little bit of software you can get the digital audio data in any format you desire.

I know the JLSounds XMOS board supports the AD1865, which is an 18-bit DAC but its interface is dual-mono, not interleaved stereo. It shouldn't be hard to modify the code to output 18-bit interleaved in a 48-bit frame as expected by the TDA1549.
The Marantz uses exactly the same board as the Philips unit iirc; it's basically an OEMed CDP in a nicer enclosure aka the same thing electronically.

I assume that the 48 bits will contain left and right in it in an MSBF format as specified. Would require looking up on how to program an XMOS to output those 48 bits :cool:
 
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I'm just assuming that the 'Standard Japanese input format' stated on the datasheet means EIAJ tbh, deduced from the meagre information I managed to find on the web.

I must apologize here as I had overlooked the fact that this chip you're using requires 4fs input data - but what comes out of the DIR9001 on the board I suggested is only 1fs. So this means there must be a digital filter somewhere in your Marantz player which upsamples the data off the CD to 4fs. You'll need to find out what that is - do you have a service manual?
 
When I suggested understanding the Marantz implementation I meant studying the Marantz schematic. The output of CD transport is 16-bit/44.1K. The input to the DAC chip is 18-bit/192K. That suggests there is some magic, probably an 4X digital filter, between the transport and the DAC. It would be nice to know what that is. It might be easier to tap into the circuit before the filter rather than before the DAC. Who knows, the input to the filter might be I2S.