Model of Aleph CS setting in ZV4?

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While waiting for the last of the funding/parts to start on my ZV4's I decided to model the amp in spice and also model using pairs of devices to bring down the junction temps.
With the original design, using the 1.5k resistor at R16, the sim shows a 70% current load fraction for the Aleph current source, not 50% as I thought was desired. This is based on calculating Irms at both 60Hz and 1kHz across R0/R1 and R14/R15. I end up with ~2.1k for R16 for the 50% load factor.

Is this due to the limitations of the models? Other than this the model seems to check out, votages, bias currents, ~max RMS power, etc. I used IRF's and zetex's semi models, but spice idealized resitors and caps, not the semi models for those parts. Has anyone else Spiced the ZV4 or built up the Amp and done the measurement? Just curious.....

My confusion with my result is that I thought the circuit was designed to attain the 50% load sharing. My 70% number is a pretty big (40%) deviation. And always, the first place I look for an error is in my own work (like a good little engineer:rolleyes: )

Anyone measured the builtup board or had experience with erroneous model performance of this scale? I'm a relative beginner to Spice modelling and if this represents a limitation there, its a good learning experience.

The one and only
Joined 2001
Paid Member
I can't speak to the simulation, but 50% is generally
the optimum number, and I recall adjusting the values
for that and building an additional 2 channels which
worked the same as the prototype.

The transconductance of the Mosfet figures into the
equation, and the higher it is, the higher the gain of
the circuit. If you assume an idealized Mosfet, you
will see somewhat more gain, although 70% is a
high figure considering.

If the current source DC value is set high, it will support
a higher gain figure if you want it, and in the case of the
ZV4 with a 2 amp bias, you can run it that high without
creating shutoff distortion in the current source into 8

If there is any question as to the gain of the current source,
just compare the net AC current values of the source
resistors vs the output resistors, preferrably in a real

Thanks Nelson,
I guess I'll wait till I have the real thing in front of me.

One other question, I understand the effect of parrallel devices in reducing junction temps, but don't understand the effect on Bass response that many have indicated, can anyone give me a bit more insight into this? ( Just to dot my i's, I have searched the forums)

Yea, and i don´t understand if ZEN philosopie says, only one transistor is good, because only one device causes distorsion, why is it an improvement to use more paralled devices in aleph30 than used in aleph3 ? why cause more devices in parallel. less distorsion? would it be an improvement to put 6 Fets in parallel in ZEN?
The one and only
Joined 2001
Paid Member
Topologically I treat parallel Mosfets as one big fat
Mosfet, which is what they act like, and are.

An IRF250 looks a lot like two IRF240's in parallel, for example.

As you parallel devices, or use bigger chips, the transconductance
and the capacitance go up. The typical result is better bottom
end due to higher open loop gain. Meanwhile, the high frequency
bandwidth will be subtly reduced.
thanks Nelson.

sorry for posting in the wrong thread, if i plan to biamp with two ZEN V4, would it be an improvement to build the low frequency amp with paralled IRFP044?
and would it be ok to leave away the big output cap / use a smaller one / as a kind of tweeter protection (in the high frequency one of course)?
The one and only
Joined 2001
Paid Member

Check the thread about the ZV4 and the Raven ribbon

As the output cap rolloff occurs at higher frequencies, we
get some High Q character to it, and we prefer to avoid that.

If you want to use a smaller cap, it's really just easier to
attach it inside the Big Cap (+) and then off to the speaker,
bypassing the big cap but leaving it in the circuit.

If you really want to reduce the size of the big cap, you
will want to play with C2 also.

Paralleling the devices will work, as long as each gets its
own Gate resistor and they are matched for Vgs.
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