I'm currently designing a PCB board that is essentially a simplified version of mhennessy's Hi-Fi preamp design. His excellent website detailing this design is at Hi-Fi Preamp. I had a few questions that I was hoping some one might be able to answer in hopes of making the PCB right the first time. My main question is the last, but is also the most involved, so I'll ask the easier questions first. Be prepared for quite the tome.
10) The power supply schematics. (left side of the "Control" PDF file in schematics or shown below).
a. Why isn't there full-wave rectification on the 12 VAC line coming in? I'm assuming this was accidentally left out and I'm going to assume full-wave rectification.
b. I'm trying to understand the logic of the transistors in the "power fail detect" circuitry (left side of the "Control" PDF file in schematics). I think I've figured out how they work, but would appreciate some confirmation. For clarify, let's call the 3x BC548B NPN BJTs as Q1, Q2, Q3 (starting from the left) and the BC327 PNP BJT on the top as Q4.
i) Under normal operation, 12 VAC line gets rectified and smoothed with the 1000 uF caps.
ii) 12 VAC goes up to the transistor section and first passes through the 1k/1u low pass filter whereby it's even smoother, so I'm going to assume at this point it's close enough to 12 VDC to the transistors.
iii) The 47k/3k form a voltage divider so that the base of Q1 sees 6% of 12 V = 0.72 V. This "closes" Q1 (i.e. Q1 now conducts from collector to emitter).
iv) Normally, the current through the 0.1k resistor would be (0.72 V - 0.6 V)/0.1k = 1.2 mA, but given the 15k resistor at 1.2 mA, the collector voltage would be 5 V - 15k * 1.2 mA = something negative. Basically, the transistor Q1 at this point is a short, which leaves the base of transistor Q2 essentially grounded.
v) If Q2 is grounded, then the left side of the left pointing 1n4148 is at 5 V and no current flows here.
vi) Upon turn on, the current first charges the 18 uF cap. So the base of Q3 starts at ground and climbs, eventually reaching 5 V when the cap is fully charged.
vii) At 5 V, Q3 opens up and current flows from the +relay line through the 47k, 8k2, and 2V7 zener diode. This pulls the base of Q4 (the PNP transistor on top) down and shorts +relay to the +unmute output.
Now, in case the 12 VAC line drops, base voltage for Q1 drops below 0.6 V, causing base voltage for Q2 to increase and so Q2 opens. With Q2 open, the voltage at the left side of the 1n4148 drops and now acts to short the base of Q3. With Q3 shorted, the connection to ground for the the 47k and 8k2 resistors is now gone and so Q4 is pulled high and +unmute is disconnected from +relay, thereby muting the system.
This all seems plausible to me, but I for the life of me cannot really figure out what the point of the zener diode is. About 1 mA is drawn from the 2k2 resistor and much less from the 47k and 8k2 resistors. This is well below 10 mA, so I can't even consider the zener as being 2.7 V above ground.
Any ideas?
Another question: Any reason to use BJTs in the power-fail detect circuit rather than an array of MOSFETs? I'm trying to make my board as compact as possible, so a surface mount of MOSFETs is a lot more compact than several through hole BJTs.
old questions that i've moved to the end so as not to overwhelm people with the wall of text.
10) The power supply schematics. (left side of the "Control" PDF file in schematics or shown below).
a. Why isn't there full-wave rectification on the 12 VAC line coming in? I'm assuming this was accidentally left out and I'm going to assume full-wave rectification.
b. I'm trying to understand the logic of the transistors in the "power fail detect" circuitry (left side of the "Control" PDF file in schematics). I think I've figured out how they work, but would appreciate some confirmation. For clarify, let's call the 3x BC548B NPN BJTs as Q1, Q2, Q3 (starting from the left) and the BC327 PNP BJT on the top as Q4.
i) Under normal operation, 12 VAC line gets rectified and smoothed with the 1000 uF caps.
ii) 12 VAC goes up to the transistor section and first passes through the 1k/1u low pass filter whereby it's even smoother, so I'm going to assume at this point it's close enough to 12 VDC to the transistors.
iii) The 47k/3k form a voltage divider so that the base of Q1 sees 6% of 12 V = 0.72 V. This "closes" Q1 (i.e. Q1 now conducts from collector to emitter).
iv) Normally, the current through the 0.1k resistor would be (0.72 V - 0.6 V)/0.1k = 1.2 mA, but given the 15k resistor at 1.2 mA, the collector voltage would be 5 V - 15k * 1.2 mA = something negative. Basically, the transistor Q1 at this point is a short, which leaves the base of transistor Q2 essentially grounded.
v) If Q2 is grounded, then the left side of the left pointing 1n4148 is at 5 V and no current flows here.
vi) Upon turn on, the current first charges the 18 uF cap. So the base of Q3 starts at ground and climbs, eventually reaching 5 V when the cap is fully charged.
vii) At 5 V, Q3 opens up and current flows from the +relay line through the 47k, 8k2, and 2V7 zener diode. This pulls the base of Q4 (the PNP transistor on top) down and shorts +relay to the +unmute output.
Now, in case the 12 VAC line drops, base voltage for Q1 drops below 0.6 V, causing base voltage for Q2 to increase and so Q2 opens. With Q2 open, the voltage at the left side of the 1n4148 drops and now acts to short the base of Q3. With Q3 shorted, the connection to ground for the the 47k and 8k2 resistors is now gone and so Q4 is pulled high and +unmute is disconnected from +relay, thereby muting the system.
This all seems plausible to me, but I for the life of me cannot really figure out what the point of the zener diode is. About 1 mA is drawn from the 2k2 resistor and much less from the 47k and 8k2 resistors. This is well below 10 mA, so I can't even consider the zener as being 2.7 V above ground.
Any ideas?
Another question: Any reason to use BJTs in the power-fail detect circuit rather than an array of MOSFETs? I'm trying to make my board as compact as possible, so a surface mount of MOSFETs is a lot more compact than several through hole BJTs.
An externally hosted image should be here but it was not working when we last tested it.
old questions that i've moved to the end so as not to overwhelm people with the wall of text.
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Well, it might 😛
I don't have the answers to your questions but asking a million questions in one post about a project that was not widely adopted (if it all?) by many people other than the author is unlikely to get a big response. You may have more luck doing as much research as possible yourself and then starting a thread about each specific questions you have 😉
Sounds like an good project though. Not many people attempt and finish a project like this to such a degree of completion like mhennessy. Post pics when you start building the preamp!
For DIY the execution of this preamp is awsome. There are many commercal products that do not come close
However, why specifically did you select this preamp?
However, why specifically did you select this preamp?
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Okay, well since I asked too many questions, perhaps I should leave my answers so that there aren't as many.
1) Probably doesn't matter.
2) None exist.
3) Slip of the pen. Don't use 16 V decoupling caps on a 15 volt line.
4) Probably doesn't matter either way. They are probably there to limit current, but the PIC probably doesn't draw much current on its pins so it probably doesn't matter.
5) I already gave my theory.
6) My approach probably works.
7) The 7806A is probably discontinued.
8) Yes, this switch gets closed when the headphones get plugged in.
9) Gainclone power amps typically require ~150-200 Watts at full power. These op amps are not for power, so 1 A @ +/- 15 V should be more than enough?
10) I really don't know.
The execution is indeed impressive. Why I chose this project? Well, it was well-documented. It seemed to be well-thought out so that even if I didn't understand portions, I'd probably be okay just copying (though I'd like to avoid that and actually understand the design). Though, as for whether I'm really doing his "design," I'd say more accurately I'm doing a subset of his design. Pretty much every aspect was copied/inspired from his project, but I'm certainly excluding many portions of his design (12V triggers, RIAA preamp, surround module, record out lines, headphone amp).
1) copying the audio pathway
2) input selection with lots of relays driven by shift registers + darlington transistor array
3) pga2310 volume control
4) optical rotary encoder
5) vfd
6) detecting button presses with PIC ADC
7) IR control (though I'll be using an Apple Remote which utilizes the NEC IR protocol)
Now you might say I'm just making a PGA2310 based preamp with input selection that can be controlled with buttons, an optical rotary encoder, and an IR remote, but the audio pathway is certainly the trickiest part and his website certainly provided a tremendous amount of guidance. The only thing I'm really adding is an iPod input. I plan on taking the line out input from an ipod as another input and controlling the iPod using the EUSART module on the PIC.
As for posting pictures, I don't really have anything physical yet. However, I've spent the last month or so working out the PCB layout. I've put the input/output buffers, relays, PGA2310, and microcontroller all on one board. I've used SMD components as much as possible with SMD PPS caps in the signal path. It's pretty much done, except I need to figure out my front panel design to determine whether I want one or two headers to the front panel PCB(s). I also need to figure out whether I want to build the regulated power supply myself or simply use a prebuilt module (e.g. Sola SCP modules) which will determine where I put the power-fail detect circuitry. I'm also close to finishing a draft of the code for the PIC which includes everything (menu system, IR detect/decode, quadrature decoding for rotary, ADC commands, vol/input selection) but the vfd commands. Anyway, I'll post some pictures when there are some pictures to post.
1) Probably doesn't matter.
2) None exist.
3) Slip of the pen. Don't use 16 V decoupling caps on a 15 volt line.
4) Probably doesn't matter either way. They are probably there to limit current, but the PIC probably doesn't draw much current on its pins so it probably doesn't matter.
5) I already gave my theory.
6) My approach probably works.
7) The 7806A is probably discontinued.
8) Yes, this switch gets closed when the headphones get plugged in.
9) Gainclone power amps typically require ~150-200 Watts at full power. These op amps are not for power, so 1 A @ +/- 15 V should be more than enough?
10) I really don't know.
The execution is indeed impressive. Why I chose this project? Well, it was well-documented. It seemed to be well-thought out so that even if I didn't understand portions, I'd probably be okay just copying (though I'd like to avoid that and actually understand the design). Though, as for whether I'm really doing his "design," I'd say more accurately I'm doing a subset of his design. Pretty much every aspect was copied/inspired from his project, but I'm certainly excluding many portions of his design (12V triggers, RIAA preamp, surround module, record out lines, headphone amp).
1) copying the audio pathway
2) input selection with lots of relays driven by shift registers + darlington transistor array
3) pga2310 volume control
4) optical rotary encoder
5) vfd
6) detecting button presses with PIC ADC
7) IR control (though I'll be using an Apple Remote which utilizes the NEC IR protocol)
Now you might say I'm just making a PGA2310 based preamp with input selection that can be controlled with buttons, an optical rotary encoder, and an IR remote, but the audio pathway is certainly the trickiest part and his website certainly provided a tremendous amount of guidance. The only thing I'm really adding is an iPod input. I plan on taking the line out input from an ipod as another input and controlling the iPod using the EUSART module on the PIC.
As for posting pictures, I don't really have anything physical yet. However, I've spent the last month or so working out the PCB layout. I've put the input/output buffers, relays, PGA2310, and microcontroller all on one board. I've used SMD components as much as possible with SMD PPS caps in the signal path. It's pretty much done, except I need to figure out my front panel design to determine whether I want one or two headers to the front panel PCB(s). I also need to figure out whether I want to build the regulated power supply myself or simply use a prebuilt module (e.g. Sola SCP modules) which will determine where I put the power-fail detect circuitry. I'm also close to finishing a draft of the code for the PIC which includes everything (menu system, IR detect/decode, quadrature decoding for rotary, ADC commands, vol/input selection) but the vfd commands. Anyway, I'll post some pictures when there are some pictures to post.
Answer to 10 (a)
looks like they have used a 12-0 12-0 dual winding transformer . With a bridge rectifier you could have + and - voltage power supply . With 2 lots of half wave rectification ( as the schematic ) you end up with one full wave rectified voltage of 12x1.414 = 16.97V into the regulators .
looks like they have used a 12-0 12-0 dual winding transformer . With a bridge rectifier you could have + and - voltage power supply . With 2 lots of half wave rectification ( as the schematic ) you end up with one full wave rectified voltage of 12x1.414 = 16.97V into the regulators .
Answer to 10 (b)
At the instant of power up Q2 switches on via 15K bias , this takes the base of Q3 to approx 0.8V . At the same time 2V7 zener conducts via 2K2 and makes the emitter of Q3 2.7V . Therefore in order for Q3 to conduct its base now needs to be 0.6 + 2.7V . Without the zener 0.8V is enough for Q3 to conduct .
A fraction of a second later Q1 then switches on (as you descibed ) and switches Q2 off thus allowing the 18uF cap ( already at 0.8V )to slowly charge up to a higher voltage via 150K .When the base of Q3 reaches 0.6 + 2.7V it switches on which allows the base of Q4 to become 0.6V more negative than its emitter and Q4 swiches on and the relay operates .
At the instant of power up Q2 switches on via 15K bias , this takes the base of Q3 to approx 0.8V . At the same time 2V7 zener conducts via 2K2 and makes the emitter of Q3 2.7V . Therefore in order for Q3 to conduct its base now needs to be 0.6 + 2.7V . Without the zener 0.8V is enough for Q3 to conduct .
A fraction of a second later Q1 then switches on (as you descibed ) and switches Q2 off thus allowing the 18uF cap ( already at 0.8V )to slowly charge up to a higher voltage via 150K .When the base of Q3 reaches 0.6 + 2.7V it switches on which allows the base of Q4 to become 0.6V more negative than its emitter and Q4 swiches on and the relay operates .
Answer to 3
Im with you on this . 16V is enough but 10uF 30V are small enough and likely to handle more ripple current + give you a voltage safety margin .
Answer to 9
Both 5532 and 2134 approx 10mA quiescent.
This ends my answers to current questions.
Im with you on this . 16V is enough but 10uF 30V are small enough and likely to handle more ripple current + give you a voltage safety margin .
Answer to 9
Both 5532 and 2134 approx 10mA quiescent.
This ends my answers to current questions.
Thanks for the explanations epicyclic. I still have a few questions about your replies.
Regarding the transformer, in these dual winding transformers, are the two windings 180 degrees out of phase? Otherwise it still seems like both transformers will be positive at the same time. Also, I think Vac/sqrt(2) = Vrms, rather than Vac*sqrt(2) = Vrms. Namely,
However, this would suggest that 12VAC is not nearly enough to get 12 VDC out of the regulators.
Regarding 10(b). I had completely missed that Q2 switches on during power on. And about the zener, for some reason I had remembered that one should aim for around 10 mA through a zener to ensure the zener voltage. I guess this is just a safety margin because the data sheet states that Vr = 1 V @ 20 ua. So 2.7 V should be reached at 0.054 mA, so the 1 mA through the 2k2 resistor is more than enough.
However, I was hoping to clarify about the voltage at the collector of Q2 (equivalently, the base of Q3) just to ensure I'm understanding things correctly. The 5 V on Q2 and small emitter resistance 0.1k saturate Q2 so that between the collector and emitter is essentially just a small ohmic resistance Rce? So the collector voltage should be roughly (0.1k + Rce)/(0.1k + Rce + 4k7) * 5 V ~ 0.1 V, rather than the 0.8 V you mention? The qualititative behavior of the circuit (which is all that really matters in this case) doesn't really change because the zener diode still ensures that turn on of Q3 happens at 2.7 V + 0.6 V (well above 0.1 V or 0.8 V), but just wanted to make sure I was understanding things...
Regarding the transformer, in these dual winding transformers, are the two windings 180 degrees out of phase? Otherwise it still seems like both transformers will be positive at the same time. Also, I think Vac/sqrt(2) = Vrms, rather than Vac*sqrt(2) = Vrms. Namely,
An externally hosted image should be here but it was not working when we last tested it.
However, this would suggest that 12VAC is not nearly enough to get 12 VDC out of the regulators.
Regarding 10(b). I had completely missed that Q2 switches on during power on. And about the zener, for some reason I had remembered that one should aim for around 10 mA through a zener to ensure the zener voltage. I guess this is just a safety margin because the data sheet states that Vr = 1 V @ 20 ua. So 2.7 V should be reached at 0.054 mA, so the 1 mA through the 2k2 resistor is more than enough.
However, I was hoping to clarify about the voltage at the collector of Q2 (equivalently, the base of Q3) just to ensure I'm understanding things correctly. The 5 V on Q2 and small emitter resistance 0.1k saturate Q2 so that between the collector and emitter is essentially just a small ohmic resistance Rce? So the collector voltage should be roughly (0.1k + Rce)/(0.1k + Rce + 4k7) * 5 V ~ 0.1 V, rather than the 0.8 V you mention? The qualititative behavior of the circuit (which is all that really matters in this case) doesn't really change because the zener diode still ensures that turn on of Q3 happens at 2.7 V + 0.6 V (well above 0.1 V or 0.8 V), but just wanted to make sure I was understanding things...
The 12VAC points on the schematic are 180 degrees out of phase and should be wired up so .
Transformer output volts are quoted as RMS voltages . Youve converted the peak of a sine wave into RMS ....ie backwards.
Once the sine wave is full wave rectified into just positive pulses the capacitors charge up and fill in the gaps thus the DC voltage approaches the peak value of the sign wave .... ie 12x1.414 =16.97 volts . The larger value the capacitors are the nearer the peak is maintained under load conditions .
Transformer output volts are quoted as RMS voltages . Youve converted the peak of a sine wave into RMS ....ie backwards.
Once the sine wave is full wave rectified into just positive pulses the capacitors charge up and fill in the gaps thus the DC voltage approaches the peak value of the sign wave .... ie 12x1.414 =16.97 volts . The larger value the capacitors are the nearer the peak is maintained under load conditions .
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