I am talking about the plots that STEPS (ARTA) gives. These are named THD - not THD+N plots. Producing that typical THD rise at low power. Maybe this noise floor can be reduced by more averaging - I do not know.
Are we just talking about the technical techniques or the practical implementation?
Because I find Bruno's nor Hypex practical approach very far from ideal.
I would rather see a nice small ASIC, like TI TPA chips or like IRS2092 and the like.
These solutions will give a much better board real estate, the magic is just in the feedback loop.
Because I find Bruno's nor Hypex practical approach very far from ideal.
I would rather see a nice small ASIC, like TI TPA chips or like IRS2092 and the like.
These solutions will give a much better board real estate, the magic is just in the feedback loop.
I'd venture to say that once THD+N, IMD and TIMD measurements—and I think you can trust Bryston's own specs—drop below 0.01%, the user's only recourse for comparing quality of reproduction has to focus on listening to the amp(s) perform in a given system.
What about D-Sonic amps?For my knowledge there is no alternative to Putzeys when it comes to ultra-low TDD class-d-amps. If you decide for inaudible distortion instead of the lowest available - then the TPA325x-series are a good choice.