LME49830 Project/Boards...

Status
Not open for further replies.
Jump to Latest
#21
AKN said:
Oh, I thought the layout was finalized - fixed. Now we have a new PCB layout.

My immediate response is like this:
Ground plane partitioning between high - low currents. High decoupling current directed through cap pins. And how about implementing gate zener protection?
Click to expand...

All good points and will be implemented. Do you have any preference on zener?
 
#22
Thanks,
It just popped out of my mind. I can hardly keep up with your speed. 🙂

The zener protection could be a zener + 1N4148 in series (gate to output). Preferably connected before each gate resistor - less parasitics on the gates. Will LME current limit properly?
 
#23
Okay I have got the revisions in place. Here is the layout.

Capture-22.png


I will pull the trigger on these tomorrow so say anything now!
 
#24
Hi,

Nice PCB

The horizontal cut placed above the front end decoupling caps. I like that move.
Only place for one single zener at each gate. I'd like the provision for two devices in series. Zener at gate, not preceding the gate resistor?
Provision for resistors in series with D1 and D2.
Do you have any RC RF-filter at the input?

All above can of course be patched in anyway ...
 
#25
The zener is a dual type and after a little research I decided to go after the gate resistors. I can add a RF filter at the output but have often found them a little pointless. I will add a provision however so you can choose whether to fit them or not.
 
#26
Boscoe said:
The zener is a dual type and after a little research I decided to go after the gate resistors. I can add a RF filter at the output but have often found them a little pointless. I will add a provision however so you can choose whether to fit them or not.
Click to expand...

Aha, I didn't think of dual zeners.
Thanks for the RC provision. RF filtering is mandatory in my world (a life long decease I got after EMC-studies). 🙂

Edit: What is your opinion about R in series with D1 and D2? Series R will smooth the charging pulses and damp out eventual diod ringing. And finally, reduction of pulse currents into front end ground plane.

I'm looking forward to the PCB's
 
Last edited:
#27
AKN said:
Aha, I didn't think of dual zeners.
Thanks for the RC provision. RF filtering is mandatory in my world (a life long decease I got after EMC-studies). 🙂

Edit: What is your opinion about R in series with D1 and D2? Series R will smooth the charging pulses and damp out eventual diod ringing. And finally, reduction of pulse currents into front end ground plane.

I'm looking forward to the PCB's
Click to expand...

I just read your PM though I would reply to this here instead.

The LME pulls a constant current and so there are no high current transients due to the FETs having such a high input impedance. So a constant 10mA or so will flow into the cap and out of it hence also a constant current through the diode so there won't be any other noise from it.

I have separated the GND planes and added a 1206 pad linking them so you have the option of what you put there whether it be a 0R link, low value R or a choke or something.
 
#28
Cap to cap current - lively power rails. Imagine a high load and corresponding voltage drop (front end supply will slowly follow). Then sudden light load and front end caps will take a few charging pulses. Front end rail noise reduction thanks to RC.
 
Last edited:
#30
I believe one can always have an input serial cap directly at the input terminal...
Also what is your opinion on the sink/source tracks followin close parallel to the power tracks? Same with the feedback? Is it OK?
Sink and source can follow each other really close together as long as possible and separate just before the output transistors... IMHO

Edit:
Could the chips reservoir caps be on the bottom side of the chip? Maybe better to trace the power tracks to the chip from that side and get rid of all possible interference between those and the sensitive stages of the pcb???
Also makes the sinc/source and feedback shorter - which should be nice?

Then keep signal input on the left side and power caps on the right...

IMHO...
 
Last edited:
#31
Hi Boscoe & others,

I ? in your design and mine for that matter, if the zobel ground return path should be a separate wire back to common point ground?
I looked at OPC's original "wire" design & he had no zobel network on the pcb, so if used, it would have probably been at the speaker connector and possibly share the speaker return to the common point ground, which I assume is fine.

Rick
 
#32
The boards were sent off yesterday so it's too late to correct anything now.

AKN said:
Boscoe,

Late observation.
How did you plan to deal with eventual DC offset? I see no caps at input nor feedback.
Click to expand...

I haven't been using any caps in those positions for the several boards I have made before and had minimal offset.

palstanturhin said:
I believe one can always have an input serial cap directly at the input terminal...
Also what is your opinion on the sink/source tracks followin close parallel to the power tracks? Same with the feedback? Is it OK?
Sink and source can follow each other really close together as long as possible and separate just before the output transistors... IMHO

Edit:
Could the chips reservoir caps be on the bottom side of the chip? Maybe better to trace the power tracks to the chip from that side and get rid of all possible interference between those and the sensitive stages of the pcb???
Also makes the sinc/source and feedback shorter - which should be nice?

Then keep signal input on the left side and power caps on the right...

IMHO...
Click to expand...

There's no point in running the sink/source traces together, have a look at the internal block diagram.

There will be very minimal crosstalk between these, also, the current drawn by the LME is constant.

The feedback path is tiny as they go it's about 40mm.
 
Status
Not open for further replies.
Top Bottom