Disclaimer: all this is, momentarily, LTspice-only
So no real-world prototypes made just yet...
Long story short: small-scale UcD-type amp, D-pak output FETs, IRS2011 gate driver, dead-time generation using four XOR gates, LM311 input comparator.
Input stage (LM311 & 74HC86) supplied with +/-2.5v, power section +/-25v.
Task: shifting the outputs of the XOR gates (Lo = -2.5v, Hi = +2.5v) to -25v-referenced level, while observing the recommended Hi input level of 5.5v for the IRS2011.
Restrictions: XOR gates have a max +/-12mA output current, so a common-base PNP is pretty much out (resistor values need to be too low, to get any decent switching times), so perhaps a P-FET might work best.
Issue: fall-time of the gate driver inputs (Hi-to-Lo) is a bit sluggish, which leads to the need of greater dead-time
I'm attaching a screenshot from LTspice with a comparison between the common-base level-shifter (green trace) and the P-FET version (blue trace). White trace is the input square-wave. I used those 6.2v zeners "to be on the safe side", gate-driver input-voltage-wise.
I'd really appreciate some thoughts on this. In an ideal world, it'd be nice to be able to find a solution that would scale reasonably well with slightly greater output voltages too
Best regards,
Chris
Long story short: small-scale UcD-type amp, D-pak output FETs, IRS2011 gate driver, dead-time generation using four XOR gates, LM311 input comparator.
Input stage (LM311 & 74HC86) supplied with +/-2.5v, power section +/-25v.
Task: shifting the outputs of the XOR gates (Lo = -2.5v, Hi = +2.5v) to -25v-referenced level, while observing the recommended Hi input level of 5.5v for the IRS2011.
Restrictions: XOR gates have a max +/-12mA output current, so a common-base PNP is pretty much out (resistor values need to be too low, to get any decent switching times), so perhaps a P-FET might work best.
Issue: fall-time of the gate driver inputs (Hi-to-Lo) is a bit sluggish, which leads to the need of greater dead-time
I'm attaching a screenshot from LTspice with a comparison between the common-base level-shifter (green trace) and the P-FET version (blue trace). White trace is the input square-wave. I used those 6.2v zeners "to be on the safe side", gate-driver input-voltage-wise.
I'd really appreciate some thoughts on this. In an ideal world, it'd be nice to be able to find a solution that would scale reasonably well with slightly greater output voltages too
Best regards,
Chris
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